RE: [PATCH v2 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL module

[Peng Fan]

> Subject: Re: [PATCH v2 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL
> module
> 
> On 28/02/2024 06:43, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@xxxxxxx>
> >
> > i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in
> > VPUMIX, BLK_CTRL_NETCMIX in NETCMIX, CAMERA_CSR in CAMERAMIX
> and etc.
> >
> > The BLK CTL module is used for various settings of a specific MIX,
> > such as clock, QoS and etc.
> >
> > This patch is to add some BLK CTL modules that has clock features.
> 
> Please use subject prefixes matching the subsystem. You can get them for
> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your
> patch is touching.
> 
> There are some typos, so you miss my filters...

Ah.. ok, will check more. Please ignore V3.

> 
> >
> > Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
> > ---
> >  .../devicetree/bindings/clock/imx95-blk-ctl.yaml   | 61
> ++++++++++++++++++++++
> >  include/dt-bindings/clock/nxp,imx95-clock.h        | 32 ++++++++++++
> >  2 files changed, 93 insertions(+)
> >

[....]
> 
> Filename like compatible. We talked about this.

ok, will use nxp,imx95-blk-ctl.yaml.
> 
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-
> schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx
> >
> +p.com%7Ca6ed8c5ca4a745204f0e08dc38313f37%7C686ea1d3bc2b4c6fa9
> 2cd99c5c
> >
> +301635%7C0%7C0%7C638447031362290549%7CUnknown%7CTWFpbGZs
> b3d8eyJWIjoiM
> >
> +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> C%7C%7
> >
> +C&sdata=DWrWMkSOrl%2FfCdEf%2BcTFjunNM66q3hHkPFGCzk1%2FsHo%3
> D&reserved
> > +=0
> > +
> > +title: NXP i.MX95 Block Control
> > +
> > +maintainers:
> > +  - Peng Fan <peng.fan@xxxxxxx>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - nxp,imx95-cameramix-csr
> > +          - nxp,imx95-display-master-csr
> > +          - nxp,imx95-dispmix-lvds-csr
> > +          - nxp,imx95-dispmix-csr
> > +          - nxp,imx95-netcmix-blk-ctrl
> > +          - nxp,imx95-vpumix-csr
> > +      - const: syscon
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  '#clock-cells':
> > +    const: 1
> > +    description:
> > +      The clock consumer should specify the desired clock by having the
> clock
> > +      ID in its "clocks" phandle cell. See
> > +      include/dt-bindings/clock/nxp,imx95-clock.h
> > +
> > +  mux-controller:
> > +    type: object
> > +    $ref: /schemas/mux/reg-mux.yaml
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - '#clock-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  # Clock Control Module node:
> > +  - |
> > +    #include <dt-bindings/clock/nxp,imx95-clock.h>
> > +
> > +    syscon@4c410000 {
> > +      compatible = "fsl,imx95-vpumix-csr", "syscon";
> > +      reg = <0x4c410000 0x10000>;
> > +      #clock-cells = <1>;
> 
> Incomplete example. Add here mux controller and power domains.

ok. But since the power is managed by SCMI FW, and no
header such as nxp,imx95-power.h, so I will use the number,
such as <&scmi_devpd 0x5>.

Thanks,
Peng.
> 
> 
> Best regards,
> Krzysztof