[PATCH] dmaengine: tegra186: Fix residual calculation

[Akhil R]

The exisiting residual calculation returns an incorrect value when
bytes_xfer == bytes_req. This scenario occurs particularly with
drivers like UART where DMA is scheduled for maximum number of bytes and
is terminated when the bytes inflow stops. At higher baud rates, it
could request the tx_status while there is no bytes left to transfer.
This will lead to incorrect residual being set. Hence return residual as
'0' when bytes transferred equals to the bytes requested.

Fixes: ee17028009d4 ("dmaengine: tegra: Add tegra gpcdma driver")
Signed-off-by: Akhil R <akhilrajeev@xxxxxxxxxx>
---
 drivers/dma/tegra186-gpc-dma.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
index 88547a23825b..3642508e88bb 100644
--- a/drivers/dma/tegra186-gpc-dma.c
+++ b/drivers/dma/tegra186-gpc-dma.c
@@ -746,6 +746,9 @@ static int tegra_dma_get_residual(struct tegra_dma_channel *tdc)
 	bytes_xfer = dma_desc->bytes_xfer +
 		     sg_req[dma_desc->sg_idx].len - (wcount * 4);
 
+	if (dma_desc->bytes_req == bytes_xfer)
+		return 0;
+
 	residual = dma_desc->bytes_req - (bytes_xfer % dma_desc->bytes_req);
 
 	return residual;
-- 
2.43.2