[PATCH 2/2] mips: dts: ralink: mt7621: add serial1 and serial2 nodes
From: Justin Swartz
Date: Wed Mar 06 2024 - 16:50:41 EST
Add serial1 and serial2 nodes to define the existence of
UART1 and UART2.
Signed-off-by: Justin Swartz <justin.swartz@xxxxxxxxxxxxxxxx>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 38 +++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index dca415fdd..2069249c8 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -128,6 +128,44 @@ serial0: serial@c00 {
pinctrl-0 = <&uart1_pins>;
};
+ serial1: serial@d00 {
+ status = "disabled";
+
+ compatible = "ns16550a";
+ reg = <0xd00 0x100>;
+
+ clocks = <&sysc MT7621_CLK_UART2>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ no-loopback-test;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ };
+
+ serial2: serial@e00 {
+ status = "disabled";
+
+ compatible = "ns16550a";
+ reg = <0xe00 0x100>;
+
+ clocks = <&sysc MT7621_CLK_UART3>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ no-loopback-test;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ };
+
spi0: spi@b00 {
status = "disabled";
--