RE: [PATCH v4 0/6] Add support i.MX95 BLK CTL module clock features

[Peng Fan]

> Subject: Re: [PATCH v4 0/6] Add support i.MX95 BLK CTL module clock
> features
> 
> On 24-03-18, Peng Fan wrote:
> > Hi Marco,
> >
> > > Subject: Re: [PATCH v4 0/6] Add support i.MX95 BLK CTL module clock
> > > features
> > >
> > > Hi Peng,
> > >
> > > thank for the patchset.
> > >
> > > On 24-03-14, Peng Fan (OSS) wrote:
> > > > i.MX95's several MIXes has BLK CTL module which could be used for
> > > > clk settings, QoS settings, Misc settings for a MIX. This patchset
> > > > is to add the clk feature support, including dt-bindings
> > >
> > > I have to ask since there is almost no public documentation
> > > available yet. The
> > > i.MX95 does have an system-controller for managing pinmux settings
> > > and power-domains, right?
> >
> > Yes.
> >
> > If this is the case, why not making use of it via the
> > > standard scmi_pm_domain.c driver?
> >
> > The SCMI firmware not handle the BLK CTL stuff, but blk ctl stuff is a
> > mix of clk, qos, module specific things. It is not good for SCMI
> > firmare to handle it.
> 
> Currently most of the blk-ctrl users do use the blk-ctrl as power-domain
> consumer, except for the isi and the audio part. 

Yes, for i.MX8M.

So as I said above the
> scmi_pm_domain.c should be able to supply this. The audio blk-ctrl could be
> abstracted via the clk-scmi.c driver. The ISI is another topic.

Pengutronix rejected the efforts for putting blk ctrl stuff in ATF for i.MX8M
before. So we take the kernel power domain approach to handle blk ctrl
clk gating.

> 
> What you're are going to do here is to put pinctrl etc into SCMI firmware and
> power-control into Linux, which sound to me like an 50/50 approach and
> IMHO is rather sub-optimal. 

Now back to i.MX95 which supports function safety.

The SCMI firmware only handle CCM/SRC/GPC for clock/power, it not
handle blk ctrl. The BLK CTRL registers are not only for clk gating, it has
other module specific functions. Moving BLK CTRL to SCMI firmware,
means linux accessing module specific functions needs go through
vendor SCMI protocol. And BLK CTRL stuff is MIX level stuff, it is not
SOC level stuff as CCM which is system critical resource.

(BLK CTLR, I mean non system critical BLK CTRL, such as GPU,VPU,DISP)

The other approach is to let ATF as SCMI server to handle BLK CTRL stuff,
But I not see benefits.

To quote your online available fact sheet:
> 
> 8<----------------------------------------------------------
> ENERGY FLEX ARCHITECTURE
> 
> The i,MX 95 family is designed to be configurable and scalable, with multiple
> heterogenous processing domains.
> This includes an application domain with up to 6 Arm Cortex A55 cores, a
> high-performance real-time domain with Arm Cortex M7, and low-
> power/safety domain with Arm Cortex M33, each able to access interfaces
> including CAN-FD, 10GbE networking, PCIe Gen 3 x1 interfaces, and
> accelerators such as V2X, ISP, and VPU.
> 8<----------------------------------------------------------
> 
> 8<----------------------------------------------------------
> HIGH-PERFORMANCE COMPUTE
> The i.MX 95 family capabilities include a multi-core application domain with
> up to six Arm Cortex(r)-A55 cores, as well as two independent real-time
> domains for safety/low-power, and high-performance real-time use,
> consisting of high-performance Arm Cortex-M7 and Arm Cortex-M33 CPUs,
> combining low-power, real-time, and high-performance processing. The i.MX
> 95 family is designed to enable ISO 26262 ASIL-B and SIL-2 IEC 61508
> compliant platforms, with the safety domain serving as a critical capability for
> many automotive and industrial applications.
> ...
> 8<----------------------------------------------------------
> 
> To me this sound like we can turn of the power/clock of an hardware block
> which was assigned to a core running SIL-2 certified software from an non-
> critical core running Linux if we follow that approach. Also the
> SIL-2 software requires the non-critical software to turn on the power of these
> hardware blocks. Is this correct?

Non-critical software not able to turn off power/clock of a critical resource in
safety software domain.
Safety software not require non-safety software to turn on power/clocks.

CCM/SRC/GPC is handled by SCMI firmware, agent w/o safety needs use
SCMI API to request SCMI firmware to enable clock/power for a module.
The SCMI firmware will check whether the agent is allowed to touch
a clock entry or a power entry.

Regards,
Peng.

> 
> Regards,
>   Marco
> 
> > Regards,
> > Peng.
> >
> > >
> > > Regards,
> > >   Marco
> > >
> > >
> > >
> > > >
> > > > Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
> > > > ---
> > > > Changes in v4:
> > > > - Separate binding doc for each modules, I still keep the syscon
> > > > as node name, because the module is not just for clock
> > > > - Pass dt-schema check
> > > > - Update node compatibles
> > > > - Link to v3:
> > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F
> > > >
> lore%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C1e1d2c2cea9448b1bc
> 2e08
> > > >
> dc47322ce1%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63846
> 35280
> > > >
> 23000120%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi
> V2luM
> > > >
> zIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=bcZKZGSM1
> 7Nv0
> > > > Yju6wZu1mSt8GGZH73aAkj9FArP8O0%3D&reserved=0
> > > > .kernel.org%2Fr%2F20240228-imx95-blk-ctl-v3-0-
> > > 40ceba01a211%40nxp.com&d
> > > >
> > >
> ata=05%7C02%7Cpeng.fan%40nxp.com%7Caad977d7e4f94c750de408dc469
> > > b3952%7C
> > > >
> > >
> 686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63846287969085566
> > > 1%7CUnknow
> > > >
> > >
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> > > WwiLC
> > > >
> > >
> JXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=M%2B3lDY9BKvW0nHv4mtvi82RA
> > > 9IvYyz72TCbL
> > > > UpiYcG0%3D&reserved=0
> > > >
> > > > Changes in v3:
> > > > - Correct example node compatible string
> > > > - Pass "make ARCH=arm64 DT_CHECKER_FLAGS=-m -j32
> dt_binding_check"
> > > > - Link to v2:
> > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F
> > > >
> lore%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C1e1d2c2cea9448b1bc
> 2e08
> > > >
> dc47322ce1%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63846
> 35280
> > > >
> 23016027%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi
> V2luM
> > > >
> zIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=OTCEsnQm1
> PVPa
> > > > HlXr84xZtmkg1sbtz1TIRFSURLzcPM%3D&reserved=0
> > > > .kernel.org%2Fr%2F20240228-imx95-blk-ctl-v2-0-
> > > ffb7eefb6dcd%40nxp.com&d
> > > >
> > >
> ata=05%7C02%7Cpeng.fan%40nxp.com%7Caad977d7e4f94c750de408dc469
> > > b3952%7C
> > > >
> > >
> 686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63846287969086560
> > > 2%7CUnknow
> > > >
> > >
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> > > WwiLC
> > > >
> > >
> JXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=4leg49tKhwUMzvD5wlnvgVc7is%2
> > > FGMNvpYr6A
> > > > %2FAf3OU4%3D&reserved=0
> > > >
> > > > Changes in v2:
> > > > - Correct example node compatible string
> > > > - Link to v1:
> > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F
> > > >
> lore%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C1e1d2c2cea9448b1bc
> 2e08
> > > >
> dc47322ce1%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63846
> 35280
> > > >
> 23029152%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi
> V2luM
> > > >
> zIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=NRw0LCxEg
> %2F8
> > > > C7WphEWYliUSufjDHQpl1qz58GTZOYxY%3D&reserved=0
> > > > .kernel.org%2Fr%2F20240228-imx95-blk-ctl-v1-0-
> > > 9b5ae3c14d83%40nxp.com&d
> > > >
> > >
> ata=05%7C02%7Cpeng.fan%40nxp.com%7Caad977d7e4f94c750de408dc469
> > > b3952%7C
> > > >
> > >
> 686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63846287969087217
> > > 2%7CUnknow
> > > >
> > >
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> > > WwiLC
> > > >
> > >
> JXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=UuD5MVPFgBqwftuXCIXB7SeGyu0
> > > NWPbwY%2Bvy
> > > > ChFLyVA%3D&reserved=0
> > > >
> > > > ---
> > > > Peng Fan (6):
> > > >       dt-bindindgs: clock: nxp: support i.MX95 VPU CSR module
> > > >       dt-bindindgs: clock: nxp: support i.MX95 Camera CSR module
> > > >       dt-bindindgs: clock: nxp: support i.MX95 Display Master CSR module
> > > >       dt-bindindgs: clock: nxp: support i.MX95 LVDS CSR module
> > > >       dt-bindindgs: clock: nxp: support i.MX95 Display CSR module
> > > >       clk: imx: add i.MX95 BLK CTL clk driver
> > > >
> > > >  .../bindings/clock/nxp,imx95-camera-csr.yaml       |  50 +++
> > > >  .../bindings/clock/nxp,imx95-display-csr.yaml      |  50 +++
> > > >  .../clock/nxp,imx95-display-master-csr.yaml        |  62 +++
> > > >  .../bindings/clock/nxp,imx95-lvds-csr.yaml         |  50 +++
> > > >  .../bindings/clock/nxp,imx95-vpu-csr.yaml          |  50 +++
> > > >  drivers/clk/imx/Kconfig                            |   7 +
> > > >  drivers/clk/imx/Makefile                           |   1 +
> > > >  drivers/clk/imx/clk-imx95-blk-ctl.c                | 438
> +++++++++++++++++++++
> > > >  include/dt-bindings/clock/nxp,imx95-clock.h        |  32 ++
> > > >  9 files changed, 740 insertions(+)
> > > > ---
> > > > base-commit: c9c32620af65fee2b1ac8390fe1349b33f9d0888
> > > > change-id: 20240228-imx95-blk-ctl-9ef8c1fc4c22
> > > >
> > > > Best regards,
> > > > --
> > > > Peng Fan <peng.fan@xxxxxxx>
> > > >
> > > >
> > > >
> >