Re: [PATCH v2] iio: adc: ad7944: Add support for "3-wire mode"

[Andy Shevchenko]

On Mon, Mar 18, 2024 at 4:17 PM David Lechner <dlechner@xxxxxxxxxxxx> wrote:
> On Mon, Mar 18, 2024 at 8:10 AM Andy Shevchenko
> <andy.shevchenko@xxxxxxxxx> wrote:
> > On Mon, Mar 18, 2024 at 2:41 PM Jonathan Cameron
> > <Jonathan.Cameron@xxxxxxxxxx> wrote:

..

> > > > >  struct ad7944_adc {
> > > > >     struct spi_device *spi;
> > > > > +   enum ad7944_spi_mode spi_mode;
> > > > >     /* Chip-specific timing specifications. */
> > > > >     const struct ad7944_timing_spec *timing_spec;
> > > > >     /* GPIO connected to CNV pin. */
> > > > > @@ -58,6 +75,9 @@ struct ad7944_adc {
> > > > >      } sample __aligned(IIO_DMA_MINALIGN);
> > > > >  };
> > > >
> > > > Have you run `pahole` to see if there is a better place for a new member?
> > >
> > > I know this matters for structures where we see lots of them, but do we actually
> > > care for one offs?  Whilst it doesn't matter here I'd focus much more
> > > on readability and like parameter grouping for cases like this than wasting
> > > a few bytes.
> >
> > This is _also_ true, but think more about cache line contamination.
> > Even not-so-important bytes may decrease the performance. In some
> > cases it's tolerable, in some it is not (high-speed ADC). In general I
> > assume that the developer has to understand many aspects of the
> > software and cache line contamination may be last but definitely not
> > least.
>
> Where could someone who doesn't know anything about cache line
> contamination learn more about it? (searching the web for that phrase
> doesn't turn up much)

Agree that I have written a rarely used term.

[1]: https://en.wikipedia.org/wiki/Cache_pollution

-- 
With Best Regards,
Andy Shevchenko