[PATCH v1 4/4] clk: meson: s4: pll: determine maximum register in regmap config

From: Dmitry Rokosov
Date: Wed Mar 20 2024 - 11:56:15 EST


When the max_register value is not set, the regmap debugfs 'registers'
file does not display the entire range of the regmap.

Signed-off-by: Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxxxxx>
---
drivers/clk/meson/s4-pll.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/clk/meson/s4-pll.c b/drivers/clk/meson/s4-pll.c
index 8dfaeccaadc2..c8a95842b14c 100644
--- a/drivers/clk/meson/s4-pll.c
+++ b/drivers/clk/meson/s4-pll.c
@@ -798,6 +798,7 @@ static struct regmap_config clkc_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
+ .max_register = ANACTRL_HDMIPLL_CTRL0,
};

static struct meson_clk_hw_data s4_pll_clks = {
--
2.43.0