[PATCH 56/64] i2c: synquacer: reword according to newest specification

[Wolfram Sang]

Match the wording of this driver wrt. the newest I2C v7, SMBus 3.2, I3C
specifications and replace "master/slave" with more appropriate terms.
They are also more specific because we distinguish now between a remote
entity ("client") and a local one ("target").

Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
---
 drivers/i2c/busses/i2c-synquacer.c | 30 ++++++++++++++----------------
 1 file changed, 14 insertions(+), 16 deletions(-)

diff --git a/drivers/i2c/busses/i2c-synquacer.c b/drivers/i2c/busses/i2c-synquacer.c
index bbea521b05dd..2fa528daaf5f 100644
--- a/drivers/i2c/busses/i2c-synquacer.c
+++ b/drivers/i2c/busses/i2c-synquacer.c
@@ -66,16 +66,16 @@
 #define SYNQUACER_I2C_BUS_CLK_FR(rate)	(((rate) / 20000000) + 1)
 
 /* STANDARD MODE frequency */
-#define SYNQUACER_I2C_CLK_MASTER_STD(rate)			\
+#define SYNQUACER_I2C_CLK__STD(rate)			\
 	DIV_ROUND_UP(DIV_ROUND_UP((rate), I2C_MAX_STANDARD_MODE_FREQ) - 2, 2)
 /* FAST MODE frequency */
-#define SYNQUACER_I2C_CLK_MASTER_FAST(rate)			\
+#define SYNQUACER_I2C_CLK__FAST(rate)			\
 	DIV_ROUND_UP((DIV_ROUND_UP((rate), I2C_MAX_FAST_MODE_FREQ) - 2) * 2, 3)
 
 /* (clkrate <= 18000000) */
 /* calculate the value of CS bits in CCR register on standard mode */
 #define SYNQUACER_I2C_CCR_CS_STD_MAX_18M(rate)			\
-	   ((SYNQUACER_I2C_CLK_MASTER_STD(rate) - 65)		\
+	   ((SYNQUACER_I2C_CLK__STD(rate) - 65)		\
 					& SYNQUACER_I2C_CCR_CS_MASK)
 
 /* calculate the value of CS bits in CSR register on standard mode */
@@ -83,7 +83,7 @@
 
 /* calculate the value of CS bits in CCR register on fast mode */
 #define SYNQUACER_I2C_CCR_CS_FAST_MAX_18M(rate)			\
-	   ((SYNQUACER_I2C_CLK_MASTER_FAST(rate) - 1)		\
+	   ((SYNQUACER_I2C_CLK__FAST(rate) - 1)		\
 					& SYNQUACER_I2C_CCR_CS_MASK)
 
 /* calculate the value of CS bits in CSR register on fast mode */
@@ -92,22 +92,22 @@
 /* (clkrate > 18000000) */
 /* calculate the value of CS bits in CCR register on standard mode */
 #define SYNQUACER_I2C_CCR_CS_STD_MIN_18M(rate)			\
-	   ((SYNQUACER_I2C_CLK_MASTER_STD(rate) - 1)		\
+	   ((SYNQUACER_I2C_CLK__STD(rate) - 1)		\
 					& SYNQUACER_I2C_CCR_CS_MASK)
 
 /* calculate the value of CS bits in CSR register on standard mode */
 #define SYNQUACER_I2C_CSR_CS_STD_MIN_18M(rate)			\
-	   (((SYNQUACER_I2C_CLK_MASTER_STD(rate) - 1) >> 5)	\
+	   (((SYNQUACER_I2C_CLK__STD(rate) - 1) >> 5)	\
 					& SYNQUACER_I2C_CSR_CS_MASK)
 
 /* calculate the value of CS bits in CCR register on fast mode */
 #define SYNQUACER_I2C_CCR_CS_FAST_MIN_18M(rate)			\
-	   ((SYNQUACER_I2C_CLK_MASTER_FAST(rate) - 1)		\
+	   ((SYNQUACER_I2C_CLK__FAST(rate) - 1)		\
 					& SYNQUACER_I2C_CCR_CS_MASK)
 
 /* calculate the value of CS bits in CSR register on fast mode */
 #define SYNQUACER_I2C_CSR_CS_FAST_MIN_18M(rate)			\
-	   (((SYNQUACER_I2C_CLK_MASTER_FAST(rate) - 1) >> 5)	\
+	   (((SYNQUACER_I2C_CLK__FAST(rate) - 1) >> 5)	\
 					& SYNQUACER_I2C_CSR_CS_MASK)
 
 /* min I2C clock frequency 14M */
@@ -255,15 +255,13 @@ static void synquacer_i2c_hw_reset(struct synquacer_i2c *i2c)
 	WAIT_PCLK(100, i2c->pclkrate);
 }
 
-static int synquacer_i2c_master_start(struct synquacer_i2c *i2c,
+static int synquacer_i2c_start(struct synquacer_i2c *i2c,
 				      struct i2c_msg *pmsg)
 {
 	unsigned char bsr, bcr;
 
 	writeb(i2c_8bit_addr_from_msg(pmsg), i2c->base + SYNQUACER_I2C_REG_DAR);
 
-	dev_dbg(i2c->dev, "slave:0x%02x\n", pmsg->addr);
-
 	/* Generate Start Condition */
 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);
@@ -281,7 +279,7 @@ static int synquacer_i2c_master_start(struct synquacer_i2c *i2c,
 		       i2c->base + SYNQUACER_I2C_REG_BCR);
 	} else {
 		if (bcr & SYNQUACER_I2C_BCR_MSS) {
-			dev_dbg(i2c->dev, "not in master mode");
+			dev_dbg(i2c->dev, "not in host mode");
 			return -EAGAIN;
 		}
 		dev_dbg(i2c->dev, "Start Condition");
@@ -329,7 +327,7 @@ static int synquacer_i2c_doxfer(struct synquacer_i2c *i2c,
 	i2c->msg_idx = 0;
 	i2c->state = STATE_START;
 
-	ret = synquacer_i2c_master_start(i2c, i2c->msg);
+	ret = synquacer_i2c_start(i2c, i2c->msg);
 	if (ret < 0) {
 		dev_dbg(i2c->dev, "Address failed: (%d)\n", ret);
 		return ret;
@@ -429,7 +427,7 @@ static irqreturn_t synquacer_i2c_isr(int irq, void *dev_id)
 		i2c->msg++;
 
 		/* send the new start */
-		ret = synquacer_i2c_master_start(i2c, i2c->msg);
+		ret = synquacer_i2c_start(i2c, i2c->msg);
 		if (ret < 0) {
 			dev_dbg(i2c->dev, "restart error (%d)\n", ret);
 			synquacer_i2c_stop(i2c, -EAGAIN);
@@ -473,7 +471,7 @@ static irqreturn_t synquacer_i2c_isr(int irq, void *dev_id)
 		i2c->msg_idx++;
 		i2c->msg++;
 
-		ret = synquacer_i2c_master_start(i2c, i2c->msg);
+		ret = synquacer_i2c_start(i2c, i2c->msg);
 		if (ret < 0) {
 			dev_dbg(i2c->dev, "restart error (%d)\n", ret);
 			synquacer_i2c_stop(i2c, -EAGAIN);
@@ -521,7 +519,7 @@ static u32 synquacer_i2c_functionality(struct i2c_adapter *adap)
 }
 
 static const struct i2c_algorithm synquacer_i2c_algo = {
-	.master_xfer	= synquacer_i2c_xfer,
+	.xfer	= synquacer_i2c_xfer,
 	.functionality	= synquacer_i2c_functionality,
 };
 
-- 
2.43.0