Re: [PATCH v1 0/1] phy: freescale: imx8m-pcie: facing pcie link-up instability
From: Fabio Estevam
Date: Fri Mar 22 2024 - 12:29:26 EST
Hi Marcel,
On Fri, Mar 22, 2024 at 10:07 AM Marcel Ziswiler <marcel@xxxxxxxxxxxx> wrote:
>
> From: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
>
>
> In our automated testing setup, we use Delock Mini-PCIe SATA cards [1].
> While this setup has proven very stable overall we noticed upstream on
> the i.MX8M Mini fails quite regularly (about 50/50) to bring up the PCIe
> link while with NXP's downstream BSP 5.15.71_2.2.2 it always works. As
> that old downstream stuff was quite different, I first also tried NXP's
> latest downstream BSP 6.1.55_2.2.0 which from a PCIe point of view is
> fairly vanilla, however, also there the PCIe link-up was not stable.
> Comparing and debugging I noticed that upstream explicitly configures
> the AUX_PLL_REFCLK_SEL to I_PLL_REFCLK_FROM_SYSPLL while working
> downstream [2] leaving it at reset defaults of AUX_IN (PLL clock).
> Unfortunately, the TRM does not mention any further details about this
> register (both for the i.MX 8M Mini as well as the Plus). Maybe somebody
> from NXP could further comment on this?
>
> BTW: On the i.MX 8M Plus we have not seen any issues with PCIe with the
> exact same setup which is why I left it unchanged.
>
> [1] https://www.delock.com/produkt/95233/merkmale.html
> [2] https://github.com/nxp-imx/linux-imx/blob/lf-5.15.71-2.2.0/drivers/pci/controller/dwc/pci-imx6.c#L1548
The detailed information above is important. It should be in the
commit log of the patch IMHO.
Thanks for the fix.