Re: [PATCH v2] clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs

[Gabor Juhos]

2024. 03. 26. 21:51 keltezéssel, Konrad Dybcio írta:

..
>> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
>> index 8a412ef47e163..8e98198d4b4b6 100644
>> --- a/drivers/clk/qcom/clk-alpha-pll.c
>> +++ b/drivers/clk/qcom/clk-alpha-pll.c
>> @@ -2490,6 +2490,10 @@ static int clk_alpha_pll_stromer_set_rate(struct clk_hw *hw, unsigned long rate,
>>  	rate = alpha_pll_round_rate(rate, prate, &l, &a, ALPHA_REG_BITWIDTH);
>>  
>>  	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
>> +
>> +	if (ALPHA_REG_BITWIDTH > ALPHA_BITWIDTH)
>> +		a <<= ALPHA_REG_BITWIDTH - ALPHA_BITWIDTH;
> 
> Uh.. that's not right, this is comparing two constants
> 
> Did you mean to use pll_alpha_width()?

No, not in this patch at least.

The clk_alpha_pll_stromer_set_rate() function assumes that the alpha register is
40 bits wide, and currently it does not use pll_alpha_width() at all.
Originally, I have converted the function to use it, but that made the change
unnecessarily complex since it was a mix of a fix and of a rework.

The current patch is a simplified version of that, but i forgot to drop the
comparison at the end of the process.

In order to keep this fix as simple as possible and backportable to stable
kernels, I would rather remove the comparison to reduce the change to a
single-line addition. Then modifying the code to use pll_alpha_width() can be
done in a separate change.

Regards,
Gabor