Re: [PATCH v1 3/3] phy: freescale: imx8q-hsio: Add i.MX8Q HSIO PHY driver support
From: kernel test robot
Date: Fri Mar 29 2024 - 20:51:29 EST
Hi Richard,
kernel test robot noticed the following build errors:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v6.9-rc1 next-20240328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Richard-Zhu/dt-bindings-phy-Add-i-MX8Q-HSIO-SerDes-PHY-binding/20240329-162937
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/1711699790-16494-4-git-send-email-hongxing.zhu%40nxp.com
patch subject: [PATCH v1 3/3] phy: freescale: imx8q-hsio: Add i.MX8Q HSIO PHY driver support
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20240330/202403300825.mjcHpoRu-lkp@xxxxxxxxx/config)
compiler: m68k-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240330/202403300825.mjcHpoRu-lkp@xxxxxxxxx/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202403300825.mjcHpoRu-lkp@xxxxxxxxx/
All errors (new ones prefixed by >>):
drivers/phy/freescale/phy-fsl-imx8q-hsio.c: In function 'imx8q_hsio_set_mode':
>> drivers/phy/freescale/phy-fsl-imx8q-hsio.c:367:15: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
367 | val = FIELD_PREP(MODE_MASK, val);
| ^~~~~~~~~~
cc1: some warnings being treated as errors
vim +/FIELD_PREP +367 drivers/phy/freescale/phy-fsl-imx8q-hsio.c
355
356 static int imx8q_hsio_set_mode(struct phy *phy, enum phy_mode mode,
357 int submode)
358 {
359 u32 val;
360 struct imx8q_hsio_lane *lane = phy_get_drvdata(phy);
361 struct imx8q_hsio_priv *priv = lane->priv;
362
363 if (lane->lane_mode != mode)
364 return -EINVAL;
365
366 val = (mode == PHY_MODE_PCIE) ? MODE_PCIE : MODE_SATA;
> 367 val = FIELD_PREP(MODE_MASK, val);
368 regmap_update_bits(priv->phy, lane->phy_off + CTRL0, MODE_MASK, val);
369
370 switch (submode) {
371 case PHY_MODE_PCIE_RC:
372 val = FIELD_PREP(DEVICE_TYPE_MASK, PCI_EXP_TYPE_ROOT_PORT);
373 break;
374 case PHY_MODE_PCIE_EP:
375 val = FIELD_PREP(DEVICE_TYPE_MASK, PCI_EXP_TYPE_ENDPOINT);
376 break;
377 default: /* Support only PCIe EP and RC now. */
378 return 0;
379 }
380 if (submode)
381 regmap_update_bits(priv->ctrl, lane->ctrl_off + CTRL0,
382 DEVICE_TYPE_MASK, val);
383
384 return 0;
385 }
386
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