[PATCH 5/5] arm64: dts: sharkl3: add missing unit addresses
From: Krzysztof Kozlowski
Date: Mon Apr 01 2024 - 10:14:41 EST
Nodes with "reg" property are supposed to have unit address, as reported
by dtc W=1 warning:
sharkl3.dtsi:42.23-48.6: Warning (unit_address_vs_reg): /soc/syscon@402b0000/pmu-gate: node has a reg or ranges property, but no unit name
sharkl3.dtsi:59.29-63.6: Warning (unit_address_vs_reg): /soc/syscon@402e0000/aonapb-gate: node has a reg or ranges property, but no unit name
sharkl3.dtsi:74.13-80.6: Warning (unit_address_vs_reg): /soc/syscon@40353000/pll: node has a reg or ranges property, but no unit name
sharkl3.dtsi:91.15-95.6: Warning (unit_address_vs_reg): /soc/syscon@40359000/mpll: node has a reg or ranges property, but no unit name
sharkl3.dtsi:106.15-112.6: Warning (unit_address_vs_reg): /soc/syscon@4035c000/rpll: node has a reg or ranges property, but no unit name
sharkl3.dtsi:123.15-127.6: Warning (unit_address_vs_reg): /soc/syscon@40363000/dpll: node has a reg or ranges property, but no unit name
sharkl3.dtsi:138.21-142.6: Warning (unit_address_vs_reg): /soc/syscon@60800000/mm-gate: node has a reg or ranges property, but no unit name
sharkl3.dtsi:153.27-159.6: Warning (unit_address_vs_reg): /soc/syscon@71300000/apapb-gate: node has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
---
arch/arm64/boot/dts/sprd/sharkl3.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/sprd/sharkl3.dtsi b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
index 206a4afdab1c..9b4ee0bdd69f 100644
--- a/arch/arm64/boot/dts/sprd/sharkl3.dtsi
+++ b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
@@ -24,7 +24,7 @@ ap_ahb_regs: syscon@20e00000 {
#size-cells = <1>;
ranges = <0 0 0x20e00000 0x4000>;
- apahb_gate: apahb-gate {
+ apahb_gate: apahb-gate@0 {
compatible = "sprd,sc9863a-apahb-gate";
reg = <0x0 0x1020>;
#clock-cells = <1>;
@@ -39,7 +39,7 @@ pmu_regs: syscon@402b0000 {
#size-cells = <1>;
ranges = <0 0 0x402b0000 0x4000>;
- pmu_gate: pmu-gate {
+ pmu_gate: pmu-gate@0 {
compatible = "sprd,sc9863a-pmu-gate";
reg = <0 0x1200>;
clocks = <&ext_26m>;
@@ -56,7 +56,7 @@ aon_apb_regs: syscon@402e0000 {
#size-cells = <1>;
ranges = <0 0 0x402e0000 0x4000>;
- aonapb_gate: aonapb-gate {
+ aonapb_gate: aonapb-gate@0 {
compatible = "sprd,sc9863a-aonapb-gate";
reg = <0 0x1100>;
#clock-cells = <1>;
@@ -71,7 +71,7 @@ anlg_phy_g2_regs: syscon@40353000 {
#size-cells = <1>;
ranges = <0 0 0x40353000 0x3000>;
- pll: pll {
+ pll: pll@0 {
compatible = "sprd,sc9863a-pll";
reg = <0 0x100>;
clocks = <&ext_26m>;
@@ -88,7 +88,7 @@ anlg_phy_g4_regs: syscon@40359000 {
#size-cells = <1>;
ranges = <0 0 0x40359000 0x3000>;
- mpll: mpll {
+ mpll: mpll@0 {
compatible = "sprd,sc9863a-mpll";
reg = <0 0x100>;
#clock-cells = <1>;
@@ -103,7 +103,7 @@ anlg_phy_g5_regs: syscon@4035c000 {
#size-cells = <1>;
ranges = <0 0 0x4035c000 0x3000>;
- rpll: rpll {
+ rpll: rpll@0 {
compatible = "sprd,sc9863a-rpll";
reg = <0 0x100>;
clocks = <&ext_26m>;
@@ -120,7 +120,7 @@ anlg_phy_g7_regs: syscon@40363000 {
#size-cells = <1>;
ranges = <0 0 0x40363000 0x3000>;
- dpll: dpll {
+ dpll: dpll@0 {
compatible = "sprd,sc9863a-dpll";
reg = <0 0x100>;
#clock-cells = <1>;
@@ -135,7 +135,7 @@ mm_ahb_regs: syscon@60800000 {
#size-cells = <1>;
ranges = <0 0 0x60800000 0x3000>;
- mm_gate: mm-gate {
+ mm_gate: mm-gate@0 {
compatible = "sprd,sc9863a-mm-gate";
reg = <0 0x1100>;
#clock-cells = <1>;
@@ -150,7 +150,7 @@ ap_apb_regs: syscon@71300000 {
#size-cells = <1>;
ranges = <0 0 0x71300000 0x4000>;
- apapb_gate: apapb-gate {
+ apapb_gate: apapb-gate@0 {
compatible = "sprd,sc9863a-apapb-gate";
reg = <0 0x1000>;
clocks = <&ext_26m>;
--
2.34.1