Re: user-space concurrent pipe buffer scheduler interactions
From: Michael Clark
Date: Wed Apr 03 2024 - 17:09:25 EST
On 4/4/24 09:39, Michael Clark wrote:
So maybe it is possible to look at how many LOCK instructions were
retired in the last scheduler quantum ideally with retired-success,
retired-failed for interlocked-compare-and-swap. Maybe it is just a
performance counter and doesn't require perf tracing switched on?
just occurred to me that you could stash the address and width of the
last failed interlocked-compare-and-swap to deduce wait-on-address or
even ask the processor in some circumstances to generate a precise
interrupt so that you could reschedule it. an idle thought. like if it
is going to fail we might as well jump straight to the scheduler.