Re: [PATCH v6] x86/mm: Don't disable INVLPG if "incomplete Global INVLPG flushes" is fixed by microcode or the kernel is running in a hypervisor

From: Xi Ruoyao
Date: Thu Apr 11 2024 - 10:49:51 EST


On Thu, 2024-04-11 at 07:44 -0700, Dave Hansen wrote:
> On 4/11/24 03:48, Xi Ruoyao wrote:
> > + /*
> > + * The Intel errata claims: "this erratum does not apply in VMX
> > + * non-root operation.  It applies only when PCIDs are enabled
> > + * and either in VMX root operation or outside VMX operation."
> > + * So we are safe if we are surely running in a hypervisor.
> > + */
>
> When you revise this, could you please work to make this more succinct?
> The Intel language on these things tends to be a bit flowery and is not
> always well-suited for the kernel.

Oops, bad timing. I just sent v7 before getting this reply.

I'm not a native English speaker, so could you give some hint about how
to write this comment clearly?

> Also, saying that the erratum "claims" this casts doubt on it.  That's
> counterproductive.  I believe the current documentation is correct.  My
> original ce0b15d11ad8 ("x86/mm: Avoid incomplete Global INVLPG flushes")
> should have considered virtualized systems immune to this issue.

Then do we need a "Fixes: ce0b15d11ad8" for the patch keeping PCID
enabled for guests?

> I agree that it sounds weird.  It _is_ weird that systems running under
> hypervisors aren't affected.  But that's all it is: a weird bug.  The
> documentation is correct.

Yes, these hardware issues are just weird to me...

--
Xi Ruoyao <xry111@xxxxxxxxxxx>
School of Aerospace Science and Technology, Xidian University