[PATCH][RFC][resend after bogus] gpio-syscon: do not report bogus error
From: Etienne Buira
Date: Thu Apr 11 2024 - 13:03:52 EST
Do not call dev_err when gpio,syscon-dev is not set albeit unneeded.
gpio-syscon is used with rk3328 chip, but this iomem region is
documented in
Documentation/devicetree/bindings/gpio/rockchip,rk3328-grf-gpio.yaml and
does not look like to require gpio,syscon-dev setting.
Signed-off-by: Etienne Buira <etienne.buira@xxxxxxx>
X-Prefers: kind explanations over rotten tomatoes
---
drivers/gpio/gpio-syscon.c | 28 ++++++++++++++++------------
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c
index 6e1a2581e6ae..14c4f224eb07 100644
--- a/drivers/gpio/gpio-syscon.c
+++ b/drivers/gpio/gpio-syscon.c
@@ -16,6 +16,7 @@
#define GPIO_SYSCON_FEAT_IN BIT(0)
#define GPIO_SYSCON_FEAT_OUT BIT(1)
#define GPIO_SYSCON_FEAT_DIR BIT(2)
+#define GPIO_SYSCON_FEAT_NODEV BIT(3)
/* SYSCON driver is designed to use 32-bit wide registers */
#define SYSCON_REG_SIZE (4)
@@ -27,7 +28,8 @@
* @flags: Set of GPIO_SYSCON_FEAT_ flags:
* GPIO_SYSCON_FEAT_IN: GPIOs supports input,
* GPIO_SYSCON_FEAT_OUT: GPIOs supports output,
- * GPIO_SYSCON_FEAT_DIR: GPIOs supports switch direction.
+ * GPIO_SYSCON_FEAT_DIR: GPIOs supports switch direction,
+ * GPIO_SYSCON_FEAT_NODEV: gpio,syscon-dev do not have to be set.
* @bit_count: Number of bits used as GPIOs.
* @dat_bit_offset: Offset (in bits) to the first GPIO bit.
* @dir_bit_offset: Optional offset (in bits) to the first bit to switch
@@ -149,7 +151,7 @@ static void rockchip_gpio_set(struct gpio_chip *chip, unsigned int offset,
static const struct syscon_gpio_data rockchip_rk3328_gpio_mute = {
/* RK3328 GPIO_MUTE is an output only pin at GRF_SOC_CON10[1] */
- .flags = GPIO_SYSCON_FEAT_OUT,
+ .flags = GPIO_SYSCON_FEAT_OUT | GPIO_SYSCON_FEAT_NODEV,
.bit_count = 1,
.dat_bit_offset = 0x0428 * 8 + 1,
.set = rockchip_gpio_set,
@@ -221,19 +223,21 @@ static int syscon_gpio_probe(struct platform_device *pdev)
if (IS_ERR(priv->syscon))
return PTR_ERR(priv->syscon);
- ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
- &priv->dreg_offset);
- if (ret)
- dev_err(dev, "can't read the data register offset!\n");
+ if (!(priv->data->flags & GPIO_SYSCON_FEAT_NODEV)) {
+ ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
+ &priv->dreg_offset);
+ if (ret)
+ dev_err(dev, "can't read the data register offset!\n");
- priv->dreg_offset <<= 3;
+ priv->dreg_offset <<= 3;
- ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
- &priv->dir_reg_offset);
- if (ret)
- dev_dbg(dev, "can't read the dir register offset!\n");
+ ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
+ &priv->dir_reg_offset);
+ if (ret)
+ dev_dbg(dev, "can't read the dir register offset!\n");
- priv->dir_reg_offset <<= 3;
+ priv->dir_reg_offset <<= 3;
+ }
priv->chip.parent = dev;
priv->chip.owner = THIS_MODULE;
base-commit: 4cece764965020c22cff7665b18a012006359095
--
2.43.0