Re: [PATCH 1/6] soc: qcom: Move some socinfo defines to the header, expand them

From: Elliot Berman
Date: Thu Apr 11 2024 - 20:50:04 EST


On Fri, Apr 12, 2024 at 02:10:30AM +0200, Konrad Dybcio wrote:
>
>
> On 4/12/24 01:49, Elliot Berman wrote:
> > On Thu, Apr 11, 2024 at 10:24:08PM +0200, Konrad Dybcio wrote:
> > >
> > >
> > > On 4/11/24 22:09, Elliot Berman wrote:
> > > > On Thu, Apr 11, 2024 at 10:05:30PM +0200, Konrad Dybcio wrote:
> > > > >
> > > > >
> > > > > On 4/11/24 20:55, Elliot Berman wrote:
> > > > > > On Fri, Apr 05, 2024 at 10:41:29AM +0200, Konrad Dybcio wrote:
> > > > > > > In preparation for parsing the chip "feature code" (FC) and "product
> > > > > > > code" (PC) (essentially the parameters that let us conclusively
> > > > > > > characterize the sillicon we're running on, including various speed
> > > > > > > bins), move the socinfo version defines to the public header and
> > > > > > > include some more FC/PC defines.
> > > > > > >
> > > > > > > Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> > > > > > > ---
> > >
> > > [...]
> > >
> > > >
> > > > 0xf is the last one.
> > >
> > > One more question, are the "internal/external feature codes" referring to
> > > internality/externality of the chips (i.e. "are they QC-lab-only engineering
> > > samples), or what else does that represent?
> >
> > Yes, QC-lab-only engineering samples is the right interpretation of
> > these feature codes.
>
> Do you think it would be beneficial to keep the logic for these ESes in
> the upstream GPU driver? Otherwise, I can yank out half of the added lines.
>

Should be fine to yank, IMO.