Re: [PATCH v4 7/9] riscv: vector: adjust minimum Vector requirement to ZVE32X

[Conor Dooley]

On Thu, Apr 18, 2024 at 11:41:29AM -0700, Eric Biggers wrote:

> If the RISC-V kernel ever disables V, then it should also disable everything
> that depends on V.
> 
> This would be similar to how on x86, if the kernel decides to disable AVX to
> mitigate the Gather Data Sampling vulnerability, it also disables AVX2, AVX512,
> VAES, VPCLMULQDQ, etc.  See cpuid_deps[] in arch/x86/kernel/cpu/cpuid-deps.c.
> 
> Sometimes CPU features depend on other ones.  That's just the way things work.

🤨

> Whenever possible that should be handled centrally, not pushed down to every
> user both in-kernel and userspace.

FWIW, anything detected but rejected while probing the DT or ACPI tables
will cause riscv_isa_extension_available() (or other APIs) to return false.

Attachment: signature.asc
Description: PGP signature