[PATCH] ASoC: dt-bindings: tegra20-ac97: convert to dt schema

From: Mohammad Shehar Yaar Tausif
Date: Sun Apr 21 2024 - 07:09:52 EST


Convert NVIDIA Tegra20 AC97 binding to DT schema.

Signed-off-by: Mohammad Shehar Yaar Tausif <sheharyaar48@xxxxxxxxx>
---
.../bindings/sound/nvidia,tegra20-ac97.txt | 36 ---------
.../bindings/sound/nvidia,tegra20-ac97.yaml | 80 +++++++++++++++++++
2 files changed, 80 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
deleted file mode 100644
index eaf00102d92c..000000000000
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-NVIDIA Tegra 20 AC97 controller
-
-Required properties:
-- compatible : "nvidia,tegra20-ac97"
-- reg : Should contain AC97 controller registers location and length
-- interrupts : Should contain AC97 interrupt
-- resets : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names : Must include the following entries:
- - ac97
-- dmas : Must contain an entry for each entry in clock-names.
- See ../dma/dma.txt for details.
-- dma-names : Must include the following entries:
- - rx
- - tx
-- clocks : Must contain one entry, for the module clock.
- See ../clocks/clock-bindings.txt for details.
-- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
- of the GPIO used to reset the external AC97 codec
-- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
- of the GPIO corresponding with the AC97 DAP _FS line
-
-Example:
-
-ac97@70002000 {
- compatible = "nvidia,tegra20-ac97";
- reg = <0x70002000 0x200>;
- interrupts = <0 81 0x04>;
- nvidia,codec-reset-gpio = <&gpio 170 0>;
- nvidia,codec-sync-gpio = <&gpio 120 0>;
- clocks = <&tegra_car 3>;
- resets = <&tegra_car 3>;
- reset-names = "ac97";
- dmas = <&apbdma 12>, <&apbdma 12>;
- dma-names = "rx", "tx";
-};
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml
new file mode 100644
index 000000000000..e7ffa93eec30
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/nvidia,tegra20-ac97.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra20 AC97 controller
+
+maintainers:
+ - Thierry Reding <treding@xxxxxxxxxx>
+ - Jon Hunter <jonathanh@xxxxxxxxxx>
+
+properties:
+ compatible:
+ const: nvidia,tegra20-ac97
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: ac97
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+
+ dmas:
+ minItems: 2
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ nvidia,codec-reset-gpio:
+ description: |
+ The Tegra GPIO controller's phandle and the number
+ of the GPIO used to reset the external AC97 codec
+ maxItems: 1
+
+ nvidia,codec-sync-gpio:
+ description: |
+ The Tegra GPIO controller's phandle and the number
+ of the GPIO corresponding with the AC97 DAP _FS line
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - resets
+ - reset-names
+ - interrupts
+ - clocks
+ - dmas
+ - dma-names
+ - nvidia,codec-reset-gpio
+ - nvidia,codec-sync-gpio
+
+additionalProperties: false
+
+examples:
+ - |
+ ac97@70002000 {
+ compatible = "nvidia,tegra20-ac97";
+ reg = <0x70002000 0x200>;
+ resets = <&tegra_car 3>;
+ reset-names = "ac97";
+ interrupts = <0 81 0x04>;
+ clocks = <&tegra_car 3>;
+ dmas = <&apbdma 12>, <&apbdma 12>;
+ dma-names = "rx", "tx";
+ nvidia,codec-reset-gpio = <&gpio 170 0>;
+ nvidia,codec-sync-gpio = <&gpio 120 0>;
+ };
+...
--
2.44.0