Re: [PATCH 2/3] phy: zynqmp: Don't wait for PLL lock on nonzero PCIe lanes
From: Michal Simek
Date: Tue Apr 23 2024 - 02:26:08 EST
On 4/22/24 20:58, Sean Anderson wrote:
Similarly to DisplayPort, nonzero PCIe lanes never achieve PLL lock [1].
What is this [1] for?
M