[PATCH 05/18] clk: imx: pll14xx: Add constraint for fvco frequency

[Peng Fan (OSS)]

From: Shengjiu Wang <shengjiu.wang@xxxxxxx>

The fvco frequency range is between 1600MHz and 3200MHz, without
this constraint the fvco may out of range, the real output
frequency is no accurate.

Aslo correct the name for fvco and fout clock.

Fixes: b09c68dc57c9 ("clk: imx: pll14xx: Support dynamic rates")
Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx>
Acked-by: Jacky Bai <ping.bai@xxxxxxx>
Tested-by: Chancel Liu <chancel.liu@xxxxxxx>
Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
---
 drivers/clk/imx/clk-pll14xx.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index d63564dbb12c..55812bfb9ec2 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -131,7 +131,7 @@ static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rat
 {
 	u32 pll_div_ctl0, pll_div_ctl1;
 	int mdiv, pdiv, sdiv, kdiv;
-	long fout, rate_min, rate_max, dist, best = LONG_MAX;
+	long fvco, fout, rate_min, rate_max, dist, best = LONG_MAX;
 	const struct imx_pll14xx_rate_table *tt;
 
 	/*
@@ -144,6 +144,8 @@ static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rat
 	 *
 	 * fvco = (m * 65536 + k) * prate / (p * 65536)
 	 * fout = (m * 65536 + k) * prate / (p * 65536) / (1 << sdiv)
+	 *
+	 * e) 1600MHz <= fvco <= 3200MHz
 	 */
 
 	/* First try if we can get the desired rate from one of the static entries */
@@ -193,6 +195,10 @@ static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rat
 			kdiv = pll1443x_calc_kdiv(mdiv, pdiv, sdiv, rate, prate);
 			fout = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, kdiv, prate);
 
+			fvco = fout << sdiv;
+
+			if (fvco < 1600000000 || fvco > 3200000000)
+				continue;
 			/* best match */
 			dist = abs((long)rate - (long)fout);
 			if (dist < best) {

-- 
2.37.1