Re: [PATCH] ASoC: mediatek: mt8192: fix register configuration for tdm

From: AngeloGioacchino Del Regno
Date: Thu May 09 2024 - 05:13:37 EST


Il 09/05/24 09:31, Hsin-Te Yuan ha scritto:
For DSP_A, data is a BCK cycle behind LRCK trigger edge. For DSP_B, this
delay doesn't exist. Fix the delay configuration to match the standard.

Fixes: 52fcd65414abfc ("ASoC: mediatek: mt8192: support tdm in platform driver")
Signed-off-by: Hsin-Te Yuan <yuanhsinte@xxxxxxxxxxxx>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>