[PATCH v2 2/8] dt-bindings: counter: Add new ti,am62-eqep compatible

From: Judith Mendez
Date: Thu May 23 2024 - 19:17:21 EST


Add new compatible ti,am62-eqep for TI K3 devices. If a device
uses this compatible, require power-domains property.

Since there is only one functional and interface clock for eqep,
clock-names is not really required. The clock-name also changed
for TI K3 SoCs so make clock-names optional for the new compatible
since there is only one clock that is routed to the IP.

While we are here, add an example using ti,am62-eqep compatible.

Signed-off-by: Judith Mendez <jm@xxxxxx>
---
Changes since v1:
- Fix eqep binding for new compatible, require
power-domains for new compatible
---
.../devicetree/bindings/counter/ti-eqep.yaml | 53 +++++++++++++++++--
1 file changed, 48 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
index 85f1ff83afe72..c4bb0231f166a 100644
--- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
+++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
@@ -11,7 +11,9 @@ maintainers:

properties:
compatible:
- const: ti,am3352-eqep
+ enum:
+ - ti,am3352-eqep
+ - ti,am62-eqep

reg:
maxItems: 1
@@ -21,19 +23,43 @@ properties:
maxItems: 1

clocks:
- description: The clock that determines the SYSCLKOUT rate for the eQEP
- peripheral.
+ description: The functional and interface clock that determines the clock
+ rate for the eQEP peripheral.
maxItems: 1

clock-names:
- const: sysclkout
+ enum:
+ - sysclkout
+ - fck
+
+ power-domains:
+ maxItems: 1
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,am3352-eqep
+ then:
+ required:
+ - clock-names
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,am62-eqep
+ then:
+ required:
+ - power-domains

required:
- compatible
- reg
- interrupts
- clocks
- - clock-names

additionalProperties: false

@@ -47,4 +73,21 @@ examples:
interrupts = <79>;
};

+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/soc/ti,sci_pm_domain.h>
+
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ eqep1: counter@23210000 {
+ compatible = "ti,am62-eqep";
+ reg = <0x00 0x23210000 0x00 0x100>;
+ power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 60 0>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+ };
...
--
2.45.1