[PATCH 7/9] arm64: dts: renesas: rzg2l: Set Ethernet PVDD to 1.8V
From: Paul Barker
Date: Fri May 24 2024 - 05:48:45 EST
On the RZ/G2L & RZ/V2L SMARC SOMs, the RGMII interface between the SoC
and the Ethernet PHY operates at 1.8V.
The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.
Signed-off-by: Paul Barker <paul.barker.ct@xxxxxxxxxxxxxx>
---
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index 2b5e037ea9fa..83f5642d0d35 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -182,6 +182,7 @@ adc_pins: adc {
eth0_pins: eth0 {
txc {
pinmux = <RZG2L_PORT_PINMUX(20, 0, 1)>; /* ET0_TXC */
+ power-source = <1800>;
output-enable;
};
@@ -199,14 +200,19 @@ mux {
<RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
<RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
<RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
- <RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */
- <RZG2L_PORT_PINMUX(1, 0, 1)>; /* IRQ2 */
+ <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
+ power-source = <1800>;
+ };
+
+ irq {
+ pinmux = <RZG2L_PORT_PINMUX(1, 0, 1)>; /* IRQ2 */
};
};
eth1_pins: eth1 {
txc {
pinmux = <RZG2L_PORT_PINMUX(29, 0, 1)>; /* ET1_TXC */
+ power-source = <1800>;
output-enable;
};
@@ -224,8 +230,12 @@ mux {
<RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */
<RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */
<RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */
- <RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */
- <RZG2L_PORT_PINMUX(1, 1, 1)>; /* IRQ3 */
+ <RZG2L_PORT_PINMUX(36, 0, 1)>; /* ET1_RXD3 */
+ power-source = <1800>;
+ };
+
+ irq {
+ pinmux = <RZG2L_PORT_PINMUX(1, 1, 1)>; /* IRQ3 */
};
};
--
2.39.2