Re: [PATCH 3/3] phy: qcom: qmp-combo: Switch from V6 to V6 N4 register offsets
From: Dmitry Baryshkov
Date: Mon May 27 2024 - 05:14:06 EST
On Mon, May 27, 2024 at 10:20:37AM +0300, Abel Vesa wrote:
> Currently, none of the X1E80100 supported boards upstream have enabled
> DP. As for USB, the reason it is not broken when it's obvious that the
> offsets are wrong is because the only difference with respect to USB is
> the difference in register name. The V6 uses QPHY_V6_PCS_CDR_RESET_TIME
> while V6 N4 uses QPHY_V6_N4_PCS_RX_CONFIG. Now, in order for the DP to
> work, the DP serdes tables need to be added as they have different
> values for V6 N4 when compared to V6 ones, even though they use the same
> V6 offsets. While at it, switch swing and pre-emphasis tables to V6 as
> well.
>
> Fixes: d7b3579f84f7 ("phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys")
> Co-developed-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
> Signed-off-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 189 +++++++++++++++++++++++++-----
> drivers/phy/qualcomm/phy-qcom-qmp.h | 2 +
> 2 files changed, 162 insertions(+), 29 deletions(-)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
--
With best wishes
Dmitry