Re: [PATCH v3 1/2] x86/cpufeatures: Add AMD FAST CPPC feature flag

[Xiaojian Du]

Thanks Pawan.

On 2024/5/24 6:35, Pawan Gupta wrote:
> On Thu, May 23, 2024 at 02:16:59PM +0800, Xiaojian Du wrote:
> > From: Perry Yuan <perry.yuan@xxxxxxx>
> >
> > Some AMD Zen 4 processors support a new feature FAST CPPC which
> > allows for a faster CPPC loop due to internal architectual
> > enhancements. The goal of this faster loop is higher performance
> > at the same power consumption.
> >
> > Reference:
> > See the page 99 of PPR for AMD Family 19h Model 61h rev.B1, docID 56713
> >
> > Signed-off-by: Perry Yuan <perry.yuan@xxxxxxx>
> > Signed-off-by: Xiaojian Du <Xiaojian.Du@xxxxxxx>
> > Reviewed-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
> > ---
> >   arch/x86/include/asm/cpufeatures.h | 1 +
> >   arch/x86/kernel/cpu/scattered.c    | 1 +
> >   2 files changed, 2 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> > index 3c7434329661..6c128d463a14 100644
> > --- a/arch/x86/include/asm/cpufeatures.h
> > +++ b/arch/x86/include/asm/cpufeatures.h
> > @@ -470,6 +470,7 @@
> >   #define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* "" BHI_DIS_S HW control available */
> >   #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* "" BHI_DIS_S HW control enabled */
> >   #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
> > +#define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* "" AMD Fast CPPC */
> >   
> >   /*
> >    * BUG word(s)
> > diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> > index af5aa2c754c2..9c273c231f56 100644
> > --- a/arch/x86/kernel/cpu/scattered.c
> > +++ b/arch/x86/kernel/cpu/scattered.c
> > @@ -51,6 +51,7 @@ static const struct cpuid_bit cpuid_bits[] = {
> >   	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
> >   	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
> >   	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
> > +	{ X86_FEATURE_FAST_CPPC,	CPUID_EDX,  15, 0x80000007, 0 },
> This list is sorted by the leaf level, so position of this entry should be
> higher:
>
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index af5aa2c754c2..09e0e40dce6c 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = {
>   	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
>   	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
>   	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
> +	{ X86_FEATURE_FAST_CPPC,	CPUID_EDX, 15, 0x80000007, 0 },
>   	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
>   	{ X86_FEATURE_SMBA,		CPUID_EBX,  2, 0x80000020, 0 },
>   	{ X86_FEATURE_BMEC,		CPUID_EBX,  3, 0x80000020, 0 },
>
> >   	{ 0, 0, 0, 0, 0 }
> >   };
> >   
> > --
> > 2.34.1

Changed this position and sent V4 patch for review.

Thanks,

Xiaojian