Re: [PATCH 3/3] arm64: dts: amlogic: a4: add power domain controller node

From: Xianwei Zhao
Date: Tue May 28 2024 - 05:19:02 EST


Hi Neil,
Thanks for your reply.

On 2024/5/28 17:08, neil.armstrong@xxxxxxxxxx wrote:
[ EXTERNAL EMAIL ]

On 28/05/2024 11:00, Xianwei Zhao wrote:
Hi Neil,
    Thanks for your quickly reply.

On 2024/5/28 16:46, Neil Armstrong wrote:
[ EXTERNAL EMAIL ]

On 28/05/2024 10:39, Xianwei Zhao via B4 Relay wrote:
From: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx>

Add power domain controller node for Amlogic A4 SoC

Signed-off-by: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx>
---
  arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi | 4 ++++
  arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi        | 5 +++++
  2 files changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi
index b6106ad4a072..eebde77ae5b4 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi
@@ -27,6 +27,10 @@ xtal: xtal-clk {
              #clock-cells = <0>;
      };

+     sm: secure-monitor {
+             compatible = "amlogic,meson-gxbb-sm";
+     };
+
      soc {
              compatible = "simple-bus";
              #address-cells = <2>;
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
index 73ca1d7eed81..917c05219b9c 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
@@ -37,4 +37,9 @@ cpu3: cpu@3 {
                      enable-method = "psci";
              };
      };
+
+     pwrc: power-controller {
+             compatible = "amlogic,a4-pwrc";
+             #power-domain-cells = <1>;
+     };

pwrc is supposed to be a child of secure-monitor.

Considered writing it like this when I wrote this.

Here are two approaches: one is to include secure-monitor in the comm dtsi and fill power-controller by aliases in dtsi of each chip, while the other is to directly include secure-monitor in the dtsi of each chip. Which one do you suggest?

The bindings mandates it to be a child of the secure monitor.

Will fix it.
Neil


Neil

  };