On Tue, 28 May 2024 at 19:16, Heiko Stuebner <heiko@xxxxxxxxx> wrote:
Am Dienstag, 28. Mai 2024, 17:01:48 CEST schrieb Dragan Simic:
On 2024-05-28 16:34, Heiko Stuebner wrote:as
Am Dienstag, 28. Mai 2024, 16:05:04 CEST schrieb Dragan Simic:
On 2024-05-28 11:49, Alexey Charkov wrote:
On Mon, May 6, 2024 at 1:37 PM Alexey Charkov <alchark@xxxxxxxxx>
wrote:
This enables thermal monitoring and CPU DVFS on RK3588(s), as well
boardsactive cooling on Radxa Rock 5B via the provided PWM fan.
Some RK3588 boards use separate regulators to supply CPUs and their
respective memory interfaces, so this is handled by coupling those
regulators in affected boards' device trees to ensure that their
voltage is adjusted in step.
This also enables the built-in thermal sensor (TSADC) for all
on-SoCthat don't currently have it enabled, using the default CRU based
emergency thermal reset. This default configuration only uses
workdevices and doesn't rely on any external wiring, thus it should
doesn'tfor all devices (tested only on Rock 5B though).
The boards that have TSADC_SHUT signal wired to the PMIC reset line
can choose to override the default reset logic in favour of GPIO
driven (PMIC assisted) reset, but in my testing it didn't work on
Radxa Rock 5B - maybe I'm reading the schematic wrong and it
spinsupport PMIC assisted reset after all.
Fan control on Rock 5B has been split into two intervals: let it
accelerateat the minimum cooling state between 55C and 65C, and then
suggesting.if the system crosses the 65C mark - thanks to Dragan for
coolingThis lets some cooling setups with beefier heatsinks and/or larger
fan fins to stay in the quietest non-zero fan state while still
gaining potential benefits from the airflow it generates, and
possibly avoiding noisy speeds altogether for some workloads.
OPPs help actually scale CPU frequencies up and down for both
droppedand performance - tested on Rock 5B under varied loads. I've
day tothose OPPs that cause frequency reductions without accompanying
decrease
in CPU voltage, as they don't seem to be adding much benefit in
updatesday use, while the kernel log gets a number of "OPP is inefficient"
lines.
Note that this submission doesn't touch the SRAM read margin
thenor
the OPP calibration based on silicon quality which the downstream
driver
does and which were mentioned in [1]. It works as it is (also
confirmed by
Sebastian in his follow-up message [2]), and it is stable in my
testing on
Rock 5B, so it sounds better to merge a simple version first and
https://lore.kernel.org/linux-rockchip/CABjd4YzTL=5S7cS8ACNAYVa730WA3iGd5L_wP1Vn9=f83RCORA@xxxxxxxxxxxxxx/extend when/if required.
[1]
https://lore.kernel.org/linux-rockchip/pkyne4g2cln27dcdu3jm7bqdqpmd2kwkbguiolmozntjuiajrb@gvq4nupzna4o/[2]
been
Signed-off-by: Alexey Charkov <alchark@xxxxxxxxx>
---
Hi Heiko,
Do you think this can be merged for 6.11? Looks like there hasn't
any new feedback in a while, and it would be good to have frequency
scaling in place for RK3588.
Please let me know if you have any reservations or if we need any
broader discussion.
not really reservations, more like there was still discussion going on
around the OPPs. Meanwhile we had more discussions regarding the whole
speed binning Rockchip seems to do for rk3588 variants.
And waiting for the testing Dragan wanted to do ;-) .
I'm sorry for the delays.
Was definitly _not_ meant as blame ;-) .
The series has just too many discussions threads to unravel on half
an afternoon.
FWIW, I think the latest exchange we had with Quentin regarding the OPPs
concluded in “false alarm”, given that this version of the series only
introduces a subset of them which should apply to all RK3588(s)