Re: [PATCH -fixes] riscv: Fix fully ordered LR/SC xchg[8|16]() implementations

[Andrea Parri]

> And you already told me that privately...Sorry, my mind has been
> elsewhere lately...I'll fix that right now.

Np.  While at it, one nit below.


> >  #define arch_xchg_relaxed(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", "", "")
> > +       _arch_xchg(ptr, x, "", "", "", "", "")
> >
> >  #define arch_xchg_acquire(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", "", RISCV_ACQUIRE_BARRIER)
> > +       _arch_xchg(ptr, x, "", "", "", RISCV_ACQUIRE_BARRIER, RISCV_ACQUIRE_BARRIER)
> >
> >  #define arch_xchg_release(ptr, x)                                      \
> > -       _arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "")
> > +       _arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "", "")
> >
> >  #define arch_xchg(ptr, x)                                              \
> > -       _arch_xchg(ptr, x, ".rl", ".aqrl", "", "     fence rw, rw\n")
> > +       _arch_xchg(ptr, x, ".rl", ".aqrl", "", "     fence rw, rw\n", "")

The plain string can be replaced with RISCV_FULL_BARRIER (cf. asm/fence.h)
to match the style/approach used elsewhere in this file.

  Andrea