Re: [net-next PATCH v3] octeontx2-pf: Add ucast filter count configurability via devlink.

From: Jacob Keller
Date: Thu May 30 2024 - 14:38:37 EST




On 5/30/2024 3:15 AM, Sai Krishna wrote:
> Added a devlink param to set/modify unicast filter count. Currently
> it's hardcoded with a macro.
>
> commands:
>
> To get the current unicast filter count
> # devlink dev param show pci/0002:02:00.0 name unicast_filter_count
>
> To change/set the unicast filter count
> # devlink dev param set pci/0002:02:00.0 name unicast_filter_count
> value 5 cmode runtime
>

A bit of explanation about why this needs to be configurable would be
useful. What is the impact of lowering or raising this value? Presumably
you need to change the MCAM table size? Lowering this on one port might
enable raising it on another?

It seems reasonable to me, but it is helpful to provide such motivations
in the commit message.

> Signed-off-by: Sai Krishna <saikrishnag@xxxxxxxxxxx>
> ---
> v3:
> - Addressed review comments given by Jakub Kicinski
> 1. Documented unicast_filter_count devlink param
> 2. Minor change to match upstream code base
> v2:
> - Addressed review comments given by Simon Horman
> 1. Updated the commit message with example commads
> 2. Modified/optimized conditions
>
> .../networking/devlink/octeontx2.rst | 16 +++++
> .../marvell/octeontx2/nic/otx2_common.h | 7 +-
> .../marvell/octeontx2/nic/otx2_devlink.c | 64 +++++++++++++++++++
> .../marvell/octeontx2/nic/otx2_flows.c | 20 +++---
> .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 2 +-
> 5 files changed, 95 insertions(+), 14 deletions(-)
>
> diff --git a/Documentation/networking/devlink/octeontx2.rst b/Documentation/networking/devlink/octeontx2.rst
> index 610de99b728a..5910289b4d4e 100644
> --- a/Documentation/networking/devlink/octeontx2.rst
> +++ b/Documentation/networking/devlink/octeontx2.rst
> @@ -40,3 +40,19 @@ The ``octeontx2 AF`` driver implements the following driver-specific parameters.
> - runtime
> - Use to set the quantum which hardware uses for scheduling among transmit queues.
> Hardware uses weighted DWRR algorithm to schedule among all transmit queues.
> +
> +The ``octeontx2 PF`` driver implements the following driver-specific parameters.
> +
> +.. list-table:: Driver-specific parameters implemented
> + :widths: 5 5 5 85
> +
> + * - Name
> + - Type
> + - Mode
> + - Description
> + * - ``unicast_filter_count``
> + - u8
> + - runtime
> + - Used to Set/modify unicast filter count, which helps in better utilization of
> + resources against possible wastage(un-used) with current scheme of hardcoded
> + unicast count.

The text here could be worded a little better. Once the patch is applied
then hard coding is no longer the "current scheme".

I might have worded this like:

"Set the maximum number of unicast filters that can be programmed for
the device. This can be used to achieve better device resource
utilization, avoiding over consumption of unused MCAM table entries."

Or something similar.