Re: [PATCH 7/7] riscv: remove limit on the size of read-only section for XIP kernel

[Nam Cao]

On Mon, May 27, 2024 at 02:58:14PM +0200, Alexandre Ghiti wrote:
> > diff --git a/arch/riscv/kernel/vmlinux-xip.lds.S b/arch/riscv/kernel/vmlinux-xip.lds.S
> > index 8c3daa1b0531..01f73f2ffecc 100644
> > --- a/arch/riscv/kernel/vmlinux-xip.lds.S
> > +++ b/arch/riscv/kernel/vmlinux-xip.lds.S
> > @@ -65,10 +65,10 @@ SECTIONS
> >    * From this point, stuff is considered writable and will be copied to RAM
> >    */
> >   	__data_loc = ALIGN(PAGE_SIZE);		/* location in file */
> > -	. = KERNEL_LINK_ADDR + XIP_OFFSET;	/* location in memory */
> > +	. = ALIGN(SZ_2M);			/* location in memory */
> 
> You can't use SZ_2M here since it corresponds to PMD_SIZE for rv64 but on
> rv32 (which is allowed to use xip kernels), it's 4MB. Use SECTION_ALIGN
> instead.

SECTION_ALIGN doesn't work unfortunately. For XIP, SECTION_ALIGN is
L1_CACHE_BYTES which is 64 bytes, but we need at least PMD_SIZE alignment
to setup virtual mapping.

Ideally we use PMD_SIZE here, but I can't #include that header file.
Probably we can refactor the header files so that we can #include the
header file that PMD_SIZE is in. But I am not sure if it's worth it.

I'm thinking just go for:
ifdef CONFIG_64_BIT
	. = ALIGN(SZ_2M);
#else
	. = ALIGN(SZ_4M);
#endif

Or even simpler, just:
	. = ALIGN(SZ_4M);

As much as I hate magic numbers, I think we can give linker script some
leeway. Perhaps with an explanation why this alignment is chosen?

Or do you have a better idea?

Best regards,
Nam