Re: [PATCH RFT v3 4/4] hwmon: (spd5118) Add support for reading SPD data

[Guenter Roeck]

On 6/2/24 00:55, Thomas Weißschuh wrote:
> On 2024-06-01 21:23:24+0000, Armin Wolf wrote:
> > Am 01.06.24 um 16:08 schrieb Thomas Weißschuh:
> >
> > > On 2024-06-01 06:48:29+0000, Guenter Roeck wrote:
> > >
> > > <snip>
> > >
> > > > Makes sense. Another question:
> > > >
> > > > This:
> > > >
> > > > +        struct nvmem_config nvmem_config = {
> > > > +               .type = NVMEM_TYPE_EEPROM,
> > > > +               .name = dev_name(dev),
> > > > +               .id = NVMEM_DEVID_AUTO,
> > > >
> > > > results in:
> > > >
> > > > $ ls /sys/bus/nvmem/devices
> > > > 0-00501  0-00512  0-00523  0-00534  cmos_nvram0
> > > > ^^^^^^^  ^^^^^^^  ^^^^^^^  ^^^^^^^
> > > >
> > > > which really doesn't look good. My current plan is to go with NVMEM_DEVID_NONE,
> > > > which results in
> > > >
> > > > $ ls /sys/bus/nvmem/devices
> > > > 0-0050	0-0051	0-0052	0-0053	cmos_nvram0
> > > >
> > > > We could also used fixed strings, but "spd" results in "spd[1-4]" which
> > > > I think would be a bit misleading since the DDR3/4 SPD data format is
> > > > different, and "spd5118" would result in "spd5118[1-4]" which again would
> > > > look odd. Any suggestions ?
> > > In order of descending, personal preference:
> > >
> > > * spd-ddr5-[0-3] (.id = client->address - 0x50)
> >
> > Hi,
> >
> > this will break as soon as more than 8 DDR5 DIMMs are installed.
>
> i2c_register_spd() only handles 8 DIMMs, too.
> JESD 300-5B.01 (section 2.6.5) also defines i2c addresses for 8 DIMMS only.

Agreed, but that doesn't mean that there must only be 8 DIMMs in the system.
It only means that there can only be up to 8 DIMMs on a single I2C bus.

i2c_register_spd() only exists if CONFIG_DMI is enabled. While that is supported
for multiple architectures, it is not supported on, for example, powerpc.
DDR5 support is not limited to systems supporting DMI, and/or to systems where
DMI is enabled. The ee1004 driver explicitly supports more than one i2c bus, and
I don't think it would be a good idea to limit DDR5 support to a single bus.

Ultimately that means that we can not rely on i2c_register_spd() for
auto-instantiation, even after adding DDR5 support to it.

Thanks,
Guenter