Re: [PATCH 6/9] x86/mce: Unify AMD THR handler with MCA Polling

[Borislav Petkov]

On Thu, May 23, 2024 at 10:56:38AM -0500, Yazen Ghannam wrote:
> diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
> index 58b8efdcec0b..d6517b93c903 100644
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -660,6 +660,12 @@ static noinstr void mce_read_aux(struct mce *m, int i)
>  	}
>  }
>  
> +static void reset_thr_limit(unsigned int bank)
> +{
> +	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
> +		return amd_reset_thr_limit(bank);
> +}
> +
>  DEFINE_PER_CPU(unsigned, mce_poll_count);
>  
>  static bool ser_log_poll_error(struct mce *m)
> @@ -769,6 +775,8 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
>  			mce_log(&m);
>  
>  clear_it:
> +		reset_thr_limit(i);

	if (mca_cfg.thresholding)
		reset_thr_limit(i);

and then you don't have to do a vendor check but simply set
mca_cfg.thresholding on AMD after having defined it in the patch.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette