Re: [PATCH 2/2] arm64: dts: qcom: x1e80100: Make the PCIe 6a PHY support 4 lanes mode

[Konrad Dybcio]

On 6/3/24 14:52, Johan Hovold wrote:

[...]

> As I just mentioned in my reply on the PHY patch, this does not seem to
> work on the CRD were the link still come up as 2-lane (also with the
> clocks fixed):
>
> 	qcom-pcie 1bf8000.pci: PCIe Gen.4 x2 link up
>
> So something appears to be wrong here or in the PHY changes.

Is the device on the other end x4-capable? Or does it not matter in
this log line?

Konrad