Re: [PATCH v4 2/2] irqchip/renesas-rzg2l: Add support for RZ/Five SoC

[Lad, Prabhakar]

Hi Thomas,

Thank you for the review.

On Mon, Jun 3, 2024 at 1:40 PM Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:
>
> On Tue, Apr 30 2024 at 15:14, Prabhakar wrote:
> > +
> > +static void rzfive_irqc_irq_disable(struct irq_data *d)
> > +{
> > +     rzfive_tint_irq_endisable(d, false);
> > +     irq_chip_disable_parent(d);
> > +}
> > +
> > +static void rzfive_irqc_irq_enable(struct irq_data *d)
> > +{
> > +     rzfive_tint_irq_endisable(d, true);
> > +     irq_chip_enable_parent(d);
> > +}
>
> This looks wrong. Enable/disable should be symmetric vs. ordering, no?
>
Agreed, I will reverse the order in the disable callback and send a new version.

Cheers,
Prabhakar