Re: [PATCH v5 5/5] serial: sh-sci: Add support for RZ/V2H(P) SoC

[Geert Uytterhoeven]

Hu Prabhakar,

On Tue, Jun 4, 2024 at 7:05 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add serial support for RZ/V2H(P) SoC with earlycon.
>
> The SCIF interface in the Renesas RZ/V2H(P) is similar to that available
> in the RZ/G2L (R9A07G044) SoC, with the following differences:
>
> - RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
>   and two for Rx and Tx buffer full, all of which are edge-triggered.
> - RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
>   synchronous and asynchronous modes.
> - There are differences in the configuration of certain registers such
>   as SCSMR, SCFCR, and SCSPTR between the two SoCs.
>
> To handle these differences on RZ/V2H(P) SoC SCIx_RZV2H_SCIF_REGTYPE
> is added.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> ---
> Hi Geert, Ive restored your RB tag after rebase (as the changes were trival)
> hope that's OK.

Thanks, LGTM!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds