On 04/06/2024 16:34, Christophe Roullier wrote:
New STM32 SOC have 2 GMACs instances.I don't think this works. You now constrain the first dimension which
GMAC IP version is SNPS 4.20.
Signed-off-by: Christophe Roullier <christophe.roullier@xxxxxxxxxxx>
---
.../devicetree/bindings/net/stm32-dwmac.yaml | 41 +++++++++++++++----
1 file changed, 34 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
index 7ccf75676b6d5..ecbed9a7aaf6d 100644
--- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
@@ -22,18 +22,17 @@ select:
enum:
- st,stm32-dwmac
- st,stm32mp1-dwmac
+ - st,stm32mp13-dwmac
required:
- compatible
-allOf:
- - $ref: snps,dwmac.yaml#
-
properties:
compatible:
oneOf:
- items:
- enum:
- st,stm32mp1-dwmac
+ - st,stm32mp13-dwmac
- const: snps,dwmac-4.20a
- items:
- enum:
@@ -75,12 +74,15 @@ properties:
st,syscon:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- - items:
+ - minItems: 2
+ items:
- description: phandle to the syscon node which encompases the glue register
- description: offset of the control register
+ - description: field to set mask in register
description:
Should be phandle/offset pair. The phandle to the syscon node which
- encompases the glue register, and the offset of the control register
+ encompases the glue register, the offset of the control register and
+ the mask to set bitfield in control register
st,ext-phyclk:
description:
@@ -112,12 +114,37 @@ required:
unevaluatedProperties: false
+allOf:
+ - $ref: snps,dwmac.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - st,stm32mp1-dwmac
+ - st,stm32-dwmac
+ then:
+ properties:
+ st,syscon:
+ items:
+ maxItems: 2
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - st,stm32mp13-dwmac
+ then:
+ properties:
+ st,syscon:
+ items:
+ minItems: 3
had only one item before.
Make your example complete and test it.
Best regards,
Krzysztof