Re: [PATCH v1 1/4] dt-bindings: iio: adc: Add MediaTek MT6359 PMIC AUXADC

From: Jonathan Cameron
Date: Thu Jun 06 2024 - 15:41:12 EST


On Tue, 4 Jun 2024 11:04:25 +0200
AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> wrote:

> Il 02/06/24 11:40, Jonathan Cameron ha scritto:
> > On Thu, 30 May 2024 11:34:07 +0200
> > AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> wrote:
> >
> >> Add a new binding for the MT6350 Series (MT6357/8/9) PMIC AUXADC,
> >> providing various ADC channels for both internal temperatures and
> >> voltages, audio accessory detection (hp/mic/hp+mic and buttons,
> >> usually on a 3.5mm jack) other than some basic battery statistics
> >> on boards where the battery is managed by this PMIC.
> >>
> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
> > Hi,
> >
> > What are all the headers for given the binding doc doesn't use anything from
> > them?
> >
>
> The binding document doesn't use them, yes, but those are part of the devicetree
> binding itself, as those can be used by devicetrees to reference an ADC channel
> like <&pmic_adc MT6359_AUXADC_ACCDET>.
>
> I think growing the binding example to add an "external" node using one of those
> channels is irrelevant, as that is "outside" of the description of the AUXADC HW.

Add a note on that to the patch description and that is fine.

J
>
> Cheers,
> Angelo
>
> > Jonathan
> >
> >> ---
> >> .../iio/adc/mediatek,mt6359-auxadc.yaml | 43 +++++++++++++++++++
> >> .../iio/adc/mediatek,mt6357-auxadc.h | 21 +++++++++
> >> .../iio/adc/mediatek,mt6358-auxadc.h | 22 ++++++++++
> >> .../iio/adc/mediatek,mt6359-auxadc.h | 22 ++++++++++
> >> 4 files changed, 108 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/iio/adc/mediatek,mt6359-auxadc.yaml
> >> create mode 100644 include/dt-bindings/iio/adc/mediatek,mt6357-auxadc.h
> >> create mode 100644 include/dt-bindings/iio/adc/mediatek,mt6358-auxadc.h
> >> create mode 100644 include/dt-bindings/iio/adc/mediatek,mt6359-auxadc.h
> >>
> >> diff --git a/Documentation/devicetree/bindings/iio/adc/mediatek,mt6359-auxadc.yaml b/Documentation/devicetree/bindings/iio/adc/mediatek,mt6359-auxadc.yaml
> >> new file mode 100644
> >> index 000000000000..dd6c331905cf
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/iio/adc/mediatek,mt6359-auxadc.yaml
> >> @@ -0,0 +1,43 @@
> >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/iio/adc/mediatek,mt6359-auxadc.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: MediaTek MT6350 series PMIC AUXADC
> >> +
> >> +maintainers:
> >> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
> >> +
> >> +description:
> >> + The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
> >> + in some MediaTek PMICs, performing various PMIC related measurements
> >> + such as battery and PMIC internal voltage regulators temperatures,
> >> + accessory detection resistance (usually, for a 3.5mm audio jack)
> >> + other than voltages for various PMIC internal components.
> >> +
> >> +properties:
> >> + compatible:
> >> + enum:
> >> + - mediatek,mt6357-auxadc
> >> + - mediatek,mt6358-auxadc
> >> + - mediatek,mt6359-auxadc
> >> +
> >> + "#io-channel-cells":
> >> + const: 1
> >> +
> >> +additionalProperties: false
> >> +
> >> +required:
> >> + - compatible
> >> + - "#io-channel-cells"
> >> +
> >> +examples:
> >> + - |
> >> + pmic {
> >> + pmic_adc: adc {
> >> + compatible = "mediatek,mt6359-auxadc";
> >> + #io-channel-cells = <1>;
> >> + };
> >> + };
> >> +...
> >> diff --git a/include/dt-bindings/iio/adc/mediatek,mt6357-auxadc.h b/include/dt-bindings/iio/adc/mediatek,mt6357-auxadc.h
> >> new file mode 100644
> >> index 000000000000..03ebb1d23953
> >> --- /dev/null
> >> +++ b/include/dt-bindings/iio/adc/mediatek,mt6357-auxadc.h
> >> @@ -0,0 +1,21 @@
> >> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> >> +
> >> +#ifndef _DT_BINDINGS_MEDIATEK_MT6357_AUXADC_H
> >> +#define _DT_BINDINGS_MEDIATEK_MT6357_AUXADC_H
> >> +
> >> +/* ADC Channel Index */
> >> +#define MT6357_AUXADC_BATADC 0
> >> +#define MT6357_AUXADC_ISENSE 1
> >> +#define MT6357_AUXADC_VCDT 2
> >> +#define MT6357_AUXADC_BAT_TEMP 3
> >> +#define MT6357_AUXADC_CHIP_TEMP 4
> >> +#define MT6357_AUXADC_ACCDET 5
> >> +#define MT6357_AUXADC_VDCXO 6
> >> +#define MT6357_AUXADC_TSX_TEMP 7
> >> +#define MT6357_AUXADC_HPOFS_CAL 8
> >> +#define MT6357_AUXADC_DCXO_TEMP 9
> >> +#define MT6357_AUXADC_VCORE_TEMP 10
> >> +#define MT6357_AUXADC_VPROC_TEMP 11
> >> +#define MT6357_AUXADC_VBAT 12
> >> +
> >> +#endif
> >> diff --git a/include/dt-bindings/iio/adc/mediatek,mt6358-auxadc.h b/include/dt-bindings/iio/adc/mediatek,mt6358-auxadc.h
> >> new file mode 100644
> >> index 000000000000..efa08398fafd
> >> --- /dev/null
> >> +++ b/include/dt-bindings/iio/adc/mediatek,mt6358-auxadc.h
> >> @@ -0,0 +1,22 @@
> >> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> >> +
> >> +#ifndef _DT_BINDINGS_MEDIATEK_MT6358_AUXADC_H
> >> +#define _DT_BINDINGS_MEDIATEK_MT6358_AUXADC_H
> >> +
> >> +/* ADC Channel Index */
> >> +#define MT6358_AUXADC_BATADC 0
> >> +#define MT6358_AUXADC_VCDT 1
> >> +#define MT6358_AUXADC_BAT_TEMP 2
> >> +#define MT6358_AUXADC_CHIP_TEMP 3
> >> +#define MT6358_AUXADC_ACCDET 4
> >> +#define MT6358_AUXADC_VDCXO 5
> >> +#define MT6358_AUXADC_TSX_TEMP 6
> >> +#define MT6358_AUXADC_HPOFS_CAL 7
> >> +#define MT6358_AUXADC_DCXO_TEMP 8
> >> +#define MT6358_AUXADC_VBIF 9
> >> +#define MT6358_AUXADC_VCORE_TEMP 10
> >> +#define MT6358_AUXADC_VPROC_TEMP 11
> >> +#define MT6358_AUXADC_VGPU_TEMP 12
> >> +#define MT6358_AUXADC_VBAT 13
> >> +
> >> +#endif
> >> diff --git a/include/dt-bindings/iio/adc/mediatek,mt6359-auxadc.h b/include/dt-bindings/iio/adc/mediatek,mt6359-auxadc.h
> >> new file mode 100644
> >> index 000000000000..59826393ee7e
> >> --- /dev/null
> >> +++ b/include/dt-bindings/iio/adc/mediatek,mt6359-auxadc.h
> >> @@ -0,0 +1,22 @@
> >> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> >> +
> >> +#ifndef _DT_BINDINGS_MEDIATEK_MT6359_AUXADC_H
> >> +#define _DT_BINDINGS_MEDIATEK_MT6359_AUXADC_H
> >> +
> >> +/* ADC Channel Index */
> >> +#define MT6359_AUXADC_BATADC 0
> >> +#define MT6359_AUXADC_BAT_TEMP 1
> >> +#define MT6359_AUXADC_CHIP_TEMP 2
> >> +#define MT6359_AUXADC_ACCDET 3
> >> +#define MT6359_AUXADC_VDCXO 4
> >> +#define MT6359_AUXADC_TSX_TEMP 5
> >> +#define MT6359_AUXADC_HPOFS_CAL 6
> >> +#define MT6359_AUXADC_DCXO_TEMP 7
> >> +#define MT6359_AUXADC_VBIF 8
> >> +#define MT6359_AUXADC_VCORE_TEMP 9
> >> +#define MT6359_AUXADC_VPROC_TEMP 10
> >> +#define MT6359_AUXADC_VGPU_TEMP 11
> >> +#define MT6359_AUXADC_VBAT 12
> >> +#define MT6359_AUXADC_IBAT 13
> >> +
> >> +#endif
> >
>