[PATCH v3 7/8] arm64: dts: ti: k3-am64x-sk: Enable eQEP

From: Judith Mendez
Date: Fri Jun 07 2024 - 12:29:51 EST


There are 3 instances of eQEP on AM64x. Only EQEP0 signals
can be routed to the user expansion so enable only EQEP0
in k3-am642-sk.dts.

Signed-off-by: Judith Mendez <jm@xxxxxx>
---
Changes since v2:
- Enable eQEP0 in k3-am64 SK board
---
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 5b028b3a3192f..1987da60672a2 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -357,6 +357,16 @@ main_ecap0_pins_default: main-ecap0-default-pins {
AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
>;
};
+
+ main_eqep0_pins_default: main-eqep0-pins-default {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
+ AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
+ AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
+ AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
+ >;
+ };
+
main_wlan_en_pins_default: main-wlan-en-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
@@ -672,3 +682,11 @@ &ecap0 {
pinctrl-names = "default";
pinctrl-0 = <&main_ecap0_pins_default>;
};
+
+&eqep0 {
+ /* EQEP0_A is available on Pin 18 of header J4 */
+ /* EQEP0_B is available on Pin 22 of header J4 */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_eqep0_pins_default>;
+};
--
2.45.1