Re: [PATCH v5 1/4] mips: bmips: rework and cache CBR addr handling

[Thomas Bogendoerfer]

On Sat, May 11, 2024 at 03:03:45PM +0200, Christian Marangi wrote:
> diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
> index 99a1ba5394e0..49fe4c535161 100644
> --- a/arch/mips/bcm47xx/prom.c
> +++ b/arch/mips/bcm47xx/prom.c
> @@ -109,6 +109,8 @@ static __init void prom_init_mem(void)
>  
>  void __init prom_init(void)
>  {
> +	/* Cache CBR addr before CPU/DMA setup */
> +	bmips_cbr_addr = BMIPS_GET_CBR();
>  	prom_init_mem();
>  	setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
>  }

doesn't compile for me, probably missing and #include

Thomas.

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