On Tue, Jun 11, 2024 at 10:04:39AM +0200, Csókás Bence wrote:
Hi!
On 6/10/24 21:13, Andrew Lunn wrote:
On Fri, Jun 07, 2024 at 10:18:55AM +0200, Csókás, Bence wrote:
FEC_ECR_EN1588 bit gets cleared after MAC reset in `fec_stop()`, which
makes all 1588 functionality shut down on link-down. However, some
functionality needs to be retained (e.g. PPS) even without link.
I don't know much about PPS. Could you point to some documentation,
list email etc, which indicated PPS without link is expected to work.
Please also Cc: Richard Cochran for changes like this.
Thanks
Andrew
This is what Richard said two years ago on the now-reverted patch:
Link: https://lore.kernel.org/netdev/YvRdTwRM4JBc5RuV@xxxxxxxxxxxxxxxxxx
Thanks.
So when you have sync, you have a 1Hz clock, synchronised to the grand
master. When the link is down, or communication with the grand master
is lost, you get a free running clock of around 1Hz. I presume that if
the link does up again and communication to the grand master is
restored, there is a phase shift in the 1Hz clock, and a frequency
correction? The hardware has to cope with this.
Thanks
Andrew