Hi
On 18:47 Wed 12 Jun , Inochi Amaoto wrote:
On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:is there any URL of guideline? or did I miss anything
Remove SDHCI compatible for CV1800b from common dtsi file to put it in
the specific dtsi file of the CV1800b.
This commits aims at following the same guidelines as in the other nodes
of the CV18XX family.
couldn't find any discussion about this in v1
I tend to agree with Inochi here, if it's same across all SoC, then no bother to
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@xxxxxxxxxxx>
---
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 1 -
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index ec9530972ae2..b9cd51457b4c 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -25,3 +25,7 @@ &clint {
&clk {
compatible = "sophgo,cv1800-clk";
};
+
+&sdhci0 {
+ compatible = "sophgo,cv1800b-dwcmshc";
+};
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index 891932ae470f..7247c7c3013c 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -288,7 +288,6 @@ uart4: serial@41c0000 {
};
sdhci0: mmc@4310000 {
- compatible = "sophgo,cv1800b-dwcmshc";
reg = <0x4310000 0x1000>;
interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk CLK_AXI4_SD0>,
--
2.45.2
Hi, Jisheng,
Is this change necessary? IIRC, the sdhci is the same across
the whole series.
split, it will cause more trouble to maintain..
Regards,
Inochi