Re: [PATCH] Documentation/x86: Switch to new Intel CPU model defines

[Jonathan Corbet]

Tony Luck <tony.luck@xxxxxxxxx> writes:

> New CPU #defines encode vendor and family as well as model
> so "_FAM6" is no longer used in the #define names.
>
> Signed-off-by: Tony Luck <tony.luck@xxxxxxxxx>
> ---
>  Documentation/arch/x86/cpuinfo.rst | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/arch/x86/cpuinfo.rst b/Documentation/arch/x86/cpuinfo.rst
> index 8895784d4784..6ef426a52cdc 100644
> --- a/Documentation/arch/x86/cpuinfo.rst
> +++ b/Documentation/arch/x86/cpuinfo.rst
> @@ -112,7 +112,7 @@ conditions are met, the features are enabled by the set_cpu_cap or
>  setup_force_cpu_cap macros. For example, if bit 5 is set in MSR_IA32_CORE_CAPS,
>  the feature X86_FEATURE_SPLIT_LOCK_DETECT will be enabled and
>  "split_lock_detect" will be displayed. The flag "ring3mwait" will be
> -displayed only when running on INTEL_FAM6_XEON_PHI_[KNL|KNM] processors.
> +displayed only when running on INTEL_XEON_PHI_[KNL|KNM] processors.
>  

Applied, thanks.

jon