From: Baolu Lu<baolu.lu@xxxxxxxxxxxxxxx>I don't quite get why this is specific to the probe path and the default
Sent: Thursday, June 20, 2024 8:50 AM
On 6/20/24 12:46 AM, Jason Gunthorpe wrote:
On Wed, Jun 19, 2024 at 09:53:45AM +0800, Lu Baolu wrote:Yes. ATS is currently controlled exclusively by the iommu driver. The
When a domain is attached to a device, the required cache tags areWhat? How is this even possible?
assigned to the domain so that the related caches could be flushed
whenever it is needed. The device TLB cache tag is created selectively
by checking the ats_enabled field of the device's iommu data. This
creates an ordered dependency between attach and ATS enabling paths.
The device TLB cache tag will not be created if device's ATS is enabled
after the domain attachment. This causes some devices, for example
intel_vpu, to malfunction.
ATS is controlled exclusively by the iommu driver, how can it be
changed without the driver knowing??
intel iommu driver enables PCI/ATS on the probe path after the default
domain is attached. That means when the default domain is attached to
the device, the ats_supported is set, but ats_enabled is cleared. So the
cache tag for the device TLB won't be created.
domain.
dmar_domain_attach_device()
{
cache_tag_assign_domain();
//setup pasid entry for pt/1st/2nd
iommu_enable_pci_caps();
}
seems that for all domain attaches above is coded in a wrong order
as ats is enabled after the cache tag is assigned.
why is it considered
to affect only some devices e.g. intel_vpu?