[PATCH 0/3] x86: Make 5-level paging support unconditional for x86-64

From: Kirill A. Shutemov
Date: Fri Jun 21 2024 - 12:44:36 EST


Both Intel and AMD CPUs support 5-level paging, which is expected to
become more widely adopted in the future.

Remove CONFIG_X86_5LEVEL.

In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make
SPARSEMEM_VMEMMAP the only memory model.

Kirill A. Shutemov (3):
x86/64/mm: Always use dynamic memory layout
x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model
x86/64/mm: Make 5-level paging support unconditional

Documentation/arch/x86/cpuinfo.rst | 8 ++---
.../arch/x86/x86_64/5level-paging.rst | 9 ------
arch/x86/Kconfig | 32 ++-----------------
arch/x86/boot/compressed/pgtable_64.c | 11 ++-----
arch/x86/boot/header.S | 4 ---
arch/x86/include/asm/disabled-features.h | 9 +-----
arch/x86/include/asm/page_64.h | 2 --
arch/x86/include/asm/page_64_types.h | 11 -------
arch/x86/include/asm/pgtable_64_types.h | 24 --------------
arch/x86/kernel/alternative.c | 2 +-
arch/x86/kernel/head64.c | 7 ----
arch/x86/kernel/head_64.S | 2 --
arch/x86/mm/init.c | 4 ---
arch/x86/mm/init_64.c | 9 +-----
arch/x86/mm/pgtable.c | 2 --
drivers/firmware/efi/libstub/x86-5lvl.c | 2 +-
scripts/gdb/linux/pgtable.py | 4 +--
.../arch/x86/include/asm/disabled-features.h | 9 +-----
18 files changed, 13 insertions(+), 138 deletions(-)

--
2.43.0