[PATCH v3 0/3] Add CPG support for RZ/V2H(P) SoC

From: Prabhakar
Date: Thu Jun 27 2024 - 12:14:18 EST


From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Hi All,

This patch series aims to add the CPG support for the Renesas
RZ/V2H(P) SoC.

v2 -> v3
- Dropped '|' for CPG description
- Dropped description for '#power-domain-cells' property
- Added 3 clock inputs for CPG
- Dropped label in example node
- Used 4 spaces for example node
- Renamed r9a09g057-cpg.h -> renesas,r9a09g057-cpg.h
- Merged adding renesas,r9a09g057-cpg.h in DT binding patch
- Updated commit message for patch 1/3
- Dropped num_hw_resets from struct rzv2h_cpg_priv
- Dropped range_check for module clocks
- Made mon_index to s8 instead of u8 in struct rzv2h_mod_clk
- Added support for critical module clocks with DEF_MOD_CRITICAL
- Added check for mon_index in rzv2h_mod_clock_endisable and
rzv2h_mod_clock_is_enabled()
- Added CLK_PLLDTY
- Added core clocks sys_0_pclk and iotop_0_shclk
- Dropped r9a09g057_crit_mod_clks

v1->v2
- Updated commit message
- Updated description for binding as suggested by Geert
- Updated descriptions for clocks and resets property
- Renamed extal->qextal
- Updated '#power-domain-cells' value
- Dropped the module clocks and just added the core clocks
- Introduced family specific config option
- Now using register indexes for CLKON/CLKMON/RST/RSTMON
- Introduced PLL_CONF macro
- Dropped function pointer to get PLL_CLK1/2 offsets
- Added range check for core clks
- Dropped NULLified clocks check
- Dropped pll_clk1/clk2_offset
- Made r9a09g057_mod_clks/r9a09g057_resets as static const

v1: https://patchwork.kernel.org/project/linux-renesas-soc/cover/20240524082800.333991-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/

Cheers,
Prabhakar

Lad Prabhakar (3):
dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
clk: renesas: Add family-specific clock driver for RZ/V2H(P)
clk: renesas: Add RZ/V2H(P) CPG driver

.../bindings/clock/renesas,rzv2h-cpg.yaml | 80 +++
drivers/clk/renesas/Kconfig | 9 +
drivers/clk/renesas/Makefile | 2 +
drivers/clk/renesas/r9a09g057-cpg.c | 79 +++
drivers/clk/renesas/rzv2h-cpg.c | 667 ++++++++++++++++++
drivers/clk/renesas/rzv2h-cpg.h | 161 +++++
.../dt-bindings/clock/renesas,r9a09g057-cpg.h | 21 +
7 files changed, 1019 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml
create mode 100644 drivers/clk/renesas/r9a09g057-cpg.c
create mode 100644 drivers/clk/renesas/rzv2h-cpg.c
create mode 100644 drivers/clk/renesas/rzv2h-cpg.h
create mode 100644 include/dt-bindings/clock/renesas,r9a09g057-cpg.h

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2.34.1