Re: [PATCH] clk: qcom: gcc-x1e80100: Set parent rate for USB3 sec and tert PHY pipe clks

[Dmitry Baryshkov]

On Fri, Jun 28, 2024 at 11:14:47AM GMT, Abel Vesa wrote:
> On 24-05-31 02:56:12, Dmitry Baryshkov wrote:
> > On Thu, May 30, 2024 at 05:05:24PM +0300, Abel Vesa wrote:
> > > Allow the USB3 second and third GCC PHY pipe clocks to propagate the
> > > rate to the pipe clocks provided by the QMP combo PHYs. The first
> > > instance is already doing that.
> > 
> > Which driver changes the rate of those clocks?
> 
> Sorry for the late reply.
> 
> These clocks are consumed by the combo PHYs, so driver is
> phy-qcom-qmp-combo. This driver doesn't change the rates of the pipe
> clocks as of yet.
> 
> The fix is still good, even if it's just to align all three clocks.
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>


-- 
With best wishes
Dmitry