Re: [PATCH v1 2/2] dw_mmc-bluefield: add hw_reset() support

[Ulf Hansson]

On Tue, 25 Jun 2024 at 21:13, Liming Sun <limings@xxxxxxxxxx> wrote:
>
> Thanks, Uffe. Please see some comments/questions below.
>
> > -----Original Message-----
> > From: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
> > Sent: Thursday, June 20, 2024 10:22 AM
> > To: Liming Sun <limings@xxxxxxxxxx>
> > Cc: Adrian Hunter <adrian.hunter@xxxxxxxxx>; David Thompson
> > <davthompson@xxxxxxxxxx>; linux-mmc@xxxxxxxxxxxxxxx; linux-
> > kernel@xxxxxxxxxxxxxxx
> > Subject: Re: [PATCH v1 2/2] dw_mmc-bluefield: add hw_reset() support
> >
> > On Thu, 13 Jun 2024 at 00:53, Liming Sun <limings@xxxxxxxxxx> wrote:
> > >
> > > The eMMC RST_N register is implemented as secure register on
> > > BlueField SoC and controlled by ATF. This commit sends SMC call
> > > to ATF for the eMMC HW reset.
> >
> > Just to make sure I get this correctly. Asserting the eMMC reset line
> > is managed through a secure register? Or is this about resetting the
> > eMMC controller?
>
> Yes, asserting the eMMC reset line (RST_N) is managed through a secure register.
> It's the same register but implemented as secure and can only be written in ATF.

Okay, thanks for clarifying!

>
> >
> > No matter what, it looks to me that it should be implemented as a
> > reset provider.
>
> Do you mean that ' hw_reset()' should implement the whole function instead of just the toggling the RST_N?

Sorry, for being very unclear from my side! I was thinking of
modelling it as a GPIO pin that we can assert/deassert to manage the
reset.

However, after a second thought, it looks to me that it would be
unnecessarily complicated. That said, I decided to apply patch 1 and
patch 2, as is. While applying I took the liberty of clarifying the
commit messages a bit, please let me know if it doesn't look okay to
you.

Kind regards
Uffe



>
> >
> > Kind regards
> > Uffe
> >
> > >
> > > Reviewed-by: David Thompson <davthompson@xxxxxxxxxx>
> > > Signed-off-by: Liming Sun <limings@xxxxxxxxxx>
> > > ---
> > >  drivers/mmc/host/dw_mmc-bluefield.c | 18 +++++++++++++++++-
> > >  1 file changed, 17 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/mmc/host/dw_mmc-bluefield.c
> > b/drivers/mmc/host/dw_mmc-bluefield.c
> > > index 4747e5698f48..24e0b604b405 100644
> > > --- a/drivers/mmc/host/dw_mmc-bluefield.c
> > > +++ b/drivers/mmc/host/dw_mmc-bluefield.c
> > > @@ -3,6 +3,7 @@
> > >   * Copyright (C) 2018 Mellanox Technologies.
> > >   */
> > >
> > > +#include <linux/arm-smccc.h>
> > >  #include <linux/bitfield.h>
> > >  #include <linux/bitops.h>
> > >  #include <linux/mmc/host.h>
> > > @@ -20,6 +21,9 @@
> > >  #define BLUEFIELD_UHS_REG_EXT_SAMPLE   2
> > >  #define BLUEFIELD_UHS_REG_EXT_DRIVE    4
> > >
> > > +/* SMC call for RST_N */
> > > +#define BLUEFIELD_SMC_SET_EMMC_RST_N   0x82000007
> > > +
> > >  static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios
> > *ios)
> > >  {
> > >         u32 reg;
> > > @@ -34,8 +38,20 @@ static void dw_mci_bluefield_set_ios(struct dw_mci
> > *host, struct mmc_ios *ios)
> > >         mci_writel(host, UHS_REG_EXT, reg);
> > >  }
> > >
> > > +static void dw_mci_bluefield_hw_reset(struct dw_mci *host)
> > > +{
> > > +               struct arm_smccc_res res = { 0 };
> > > +
> > > +               arm_smccc_smc(BLUEFIELD_SMC_SET_EMMC_RST_N, 0, 0, 0, 0, 0,
> > 0, 0,
> > > +                             &res);
> > > +
> > > +               if (res.a0)
> > > +                       pr_err("RST_N failed.\n");
> > > +}
> > > +
> > >  static const struct dw_mci_drv_data bluefield_drv_data = {
> > > -       .set_ios                = dw_mci_bluefield_set_ios
> > > +       .set_ios                = dw_mci_bluefield_set_ios,
> > > +       .hw_reset               = dw_mci_bluefield_hw_reset
> > >  };
> > >
> > >  static const struct of_device_id dw_mci_bluefield_match[] = {
> > > --
> > > 2.30.1
> > >