Re: [v5 PATCH] arm64: mm: force write fault for atomic RMW instructions

[Catalin Marinas]

On Tue, Jul 09, 2024 at 10:56:55AM -0700, Yang Shi wrote:
> On 7/4/24 3:03 AM, Catalin Marinas wrote:
> > I haven't figured out what the +24% case is in there, it seems pretty
> > large.
> 
> I think I ran the test much more iterations and I didn't see such outlier
> anymore.

That's good, thanks for confirming.

> > What you haven't benchmarked (I think) is the case where the instruction
> > is in an exec-only mapping. The subsequent instruction read will fault
> > and it adds to the overhead. Currently exec-only mappings are not
> > widespread but I heard some people planning to move in this direction as
> > a default build configuration.
> 
> I tested exec-only on QEMU tcg, but I don't have a hardware supported EPAN.
> I don't think performance benchmark on QEMU tcg makes sense since it is
> quite slow, such small overhead is unlikely measurable on it.

Yeah, benchmarking under qemu is pointless. I think you can remove some
of the ARM64_HAS_EPAN checks (or replaced them with ARM64_HAS_PAN) just
for testing. For security reason, we removed this behaviour in commit
24cecc377463 ("arm64: Revert support for execute-only user mappings")
but it's good enough for testing. This should give you PROT_EXEC-only
mappings on your hardware.

-- 
Catalin