Re: [PATCH v2 7/9] arm64: dts: rockchip: use generic Ethernet PHY reset bindings for Lunzn Fastrhino R68S

From: Jonas Karlman
Date: Wed Jul 10 2024 - 10:43:35 EST


Hi,

On 2024-07-10 15:30, Chukun Pan wrote:
>> what's the reason behind the changed timings?
>>
>> The original comment stated,
>> /* Reset time is 15ms, 50ms for rtl8211f */
>> so that timing change needs an explanation please :-)
>
> I don't know why this comment says that, but it's clearly wrong.
> According to the PHY datasheet, the RTL8211F PHY needs a 10ms
> assert delay and at least 72ms deassert delay. Considering the
> possibility of mixed use of PHY chips, the reset time should be
> further increased.

Where do you find the 72ms in the datasheet?

In RTL8211F-CG v1.1 I see 10ms and minimum of 30ms, in v1.2 and v1.4
I see 10ms and minimum of 50ms.

I have used 50ms on a few recently added boards and they seem to all
work fine with 50ms, wonder if the deassert delay should be changed for
those boards.

Regards,
Jonas

>
> Thanks,
> Chukun
>