Re: [PATCH v3 0/3] Parse the HEST PCIe AER and set to relevant registers

[Yazen Ghannam]

On Thu, Jul 18, 2024 at 02:24:02PM +0800, LeoLiu-oc wrote:
> From: LeoLiuoc <LeoLiu-oc@xxxxxxxxxxx>
> 
> According to the Section 18.3.2.4, 18.3.2.5 and 18.3.2.6 in ACPI SPEC
> r6.5, the register value form HEST PCI Express AER Structure should be
> written to relevant PCIe Device's AER Capabilities. So the purpose of the
> patch set is to extract register value from HEST PCI Express AER
> structures and program them into PCIe Device's AER registers.
> Refer to the ACPI SPEC r6.5 for the more detailed description. This patch
> is an effective supplement to _HPP/_HPX method when the Firmware does not
> support the _HPP/_HPX method and can be specially configured for the AER
> register of the specific device.
> 
> v1->v2:
> - Move the definition of structure "hest_parse_aer_info" to file apei.h.
> 
> v2->v3:
> - The applicable hardware for this patch is added to the commit
>   information.
> - Change the function name "program_hest_aer_endpoint" to
>   "program_hest_aer_common".
> - Add the comment to function "program_hest_aer_common".
> - Remove the "PCI_EXP_TYPE_PCIE_BRIDGE" branch handling in function
>   "program_hest_aer_params".
>

Please include a link to previous threads, if possible.

Thanks,
Yazen