Re: [PATCH v1] arm64: dts: mediatek: mt7988: add labels for different nodes

From: Frank Wunderlich
Date: Mon Jul 22 2024 - 11:28:41 EST


Hi
Am 22. Juli 2024 17:14:07 MESZ schrieb AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>:
>Il 09/07/24 10:16, Frank Wunderlich ha scritto:
>> From: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx>
>>
>> Current devicetree-nodes missing a label which allows to add aproperties
>> or phandles to them, so add them.
>>
>> Signed-off-by: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx>
>> Fixes: 660c230bf302 ("arm64: dts: mediatek: mt7988: add I2C controllers")
>> Fixes: 09ff2216a035 ("arm64: dts: mediatek: mt7988: add PWM controller")
>> Fixes: 09346afaba0a ("arm64: dts: mediatek: mt7988: add XHCI controllers")
>> Fixes: b616b403cbff ("arm64: dts: mediatek: mt7988: add clock controllers")
>> Fixes: 6c1d134a103f ("arm64: dts: mediatek: Add initial MT7988A and BPI-R4")
>
>You're just only adding node labels, what does this actually fix?!?
>
>Besides, I could tell you to remove the Fixes tags, but then, there's still nothing
>using those node labels - so there's nothing justifying this addition, at all.
>
>I guess that you want to use those (bar the cpu[0-3] labels, which you're adding
>because... uhh.. why?) from some board DT... so please just do that: send a commit
>adding your board DT and adding the required node label(s) here as a consequence.

Currently i need these labels in uboot to add additional properties (e.g. hwver to cpu-nodes) and linking the existing nodes (clocks to eth node) to some added in uboot overlay.

Currently we face some hen-egg issue as support is in mainline uboot and we forced to move to of_upstream to add pcie support and maybe more,but in mainline linux we miss nearly all nodes we have in our private repos...but i'm busy in getting of_upstream in uboot working basicly.

>Cheers,
>Angelo
>
>> ---
>> arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 32 +++++++++++------------
>> 1 file changed, 16 insertions(+), 16 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
>> index aa728331e876..9ced005b1595 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
>> @@ -14,28 +14,28 @@ cpus {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> - cpu@0 {
>> + cpu0: cpu@0 {
>> compatible = "arm,cortex-a73";
>> reg = <0x0>;
>> device_type = "cpu";
>> enable-method = "psci";
>> };
>> - cpu@1 {
>> + cpu1: cpu@1 {
>> compatible = "arm,cortex-a73";
>> reg = <0x1>;
>> device_type = "cpu";
>> enable-method = "psci";
>> };
>> - cpu@2 {
>> + cpu2: cpu@2 {
>> compatible = "arm,cortex-a73";
>> reg = <0x2>;
>> device_type = "cpu";
>> enable-method = "psci";
>> };
>> - cpu@3 {
>> + cpu3: cpu@3 {
>> compatible = "arm,cortex-a73";
>> reg = <0x3>;
>> device_type = "cpu";
>> @@ -43,7 +43,7 @@ cpu@3 {
>> };
>> };
>> - oscillator-40m {
>> + system_clk: oscillator-40m {
>> compatible = "fixed-clock";
>> clock-frequency = <40000000>;
>> #clock-cells = <0>;
>> @@ -86,7 +86,7 @@ infracfg: clock-controller@10001000 {
>> #clock-cells = <1>;
>> };
>> - clock-controller@1001b000 {
>> + topckgen: clock-controller@1001b000 {
>> compatible = "mediatek,mt7988-topckgen", "syscon";
>> reg = <0 0x1001b000 0 0x1000>;
>> #clock-cells = <1>;
>> @@ -99,13 +99,13 @@ watchdog: watchdog@1001c000 {
>> #reset-cells = <1>;
>> };
>> - clock-controller@1001e000 {
>> + apmixedsys: clock-controller@1001e000 {
>> compatible = "mediatek,mt7988-apmixedsys";
>> reg = <0 0x1001e000 0 0x1000>;
>> #clock-cells = <1>;
>> };
>> - pwm@10048000 {
>> + pwm: pwm@10048000 {
>> compatible = "mediatek,mt7988-pwm";
>> reg = <0 0x10048000 0 0x1000>;
>> clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
>> @@ -124,7 +124,7 @@ pwm@10048000 {
>> status = "disabled";
>> };
>> - i2c@11003000 {
>> + i2c0: i2c@11003000 {
>> compatible = "mediatek,mt7981-i2c";
>> reg = <0 0x11003000 0 0x1000>,
>> <0 0x10217080 0 0x80>;
>> @@ -137,7 +137,7 @@ i2c@11003000 {
>> status = "disabled";
>> };
>> - i2c@11004000 {
>> + i2c1: i2c@11004000 {
>> compatible = "mediatek,mt7981-i2c";
>> reg = <0 0x11004000 0 0x1000>,
>> <0 0x10217100 0 0x80>;
>> @@ -150,7 +150,7 @@ i2c@11004000 {
>> status = "disabled";
>> };
>> - i2c@11005000 {
>> + i2c2: i2c@11005000 {
>> compatible = "mediatek,mt7981-i2c";
>> reg = <0 0x11005000 0 0x1000>,
>> <0 0x10217180 0 0x80>;
>> @@ -163,7 +163,7 @@ i2c@11005000 {
>> status = "disabled";
>> };
>> - usb@11190000 {
>> + ssusb0: usb@11190000 {
>> compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";
>> reg = <0 0x11190000 0 0x2e00>,
>> <0 0x11193e00 0 0x0100>;
>> @@ -177,7 +177,7 @@ usb@11190000 {
>> clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
>> };
>> - usb@11200000 {
>> + ssusb1: usb@11200000 {
>> compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";
>> reg = <0 0x11200000 0 0x2e00>,
>> <0 0x11203e00 0 0x0100>;
>> @@ -191,21 +191,21 @@ usb@11200000 {
>> clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
>> };
>> - clock-controller@11f40000 {
>> + xfi_pll: clock-controller@11f40000 {
>> compatible = "mediatek,mt7988-xfi-pll";
>> reg = <0 0x11f40000 0 0x1000>;
>> resets = <&watchdog 16>;
>> #clock-cells = <1>;
>> };
>> - clock-controller@15000000 {
>> + ethsys: clock-controller@15000000 {
>> compatible = "mediatek,mt7988-ethsys", "syscon";
>> reg = <0 0x15000000 0 0x1000>;
>> #clock-cells = <1>;
>> #reset-cells = <1>;
>> };
>> - clock-controller@15031000 {
>> + ethwarp: clock-controller@15031000 {
>> compatible = "mediatek,mt7988-ethwarp";
>> reg = <0 0x15031000 0 0x1000>;
>> #clock-cells = <1>;
>
>


regards Frank